- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374022 > ADP3419JRMZ-REEL1 (Analog Devices, Inc.) Dual Bootstrapped, High Voltage MOSFET Driver with Output Disable PDF資料下載
參數(shù)資料
| 型號： | ADP3419JRMZ-REEL1 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual Bootstrapped, High Voltage MOSFET Driver with Output Disable |
| 中文描述： | 雙自舉，高電壓MOSFET的輸出驅(qū)動器禁用 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 317K |
| 代理商： | ADP3419JRMZ-REEL1 |
ADP3419
LOW-SIDE DRIVER SHUTDOWN
The low-side driver shutdown DRVLSD allows a control signal
to shut down the synchronous rectifier. Under light load
conditions, DRVLSD should be pulled low before the polarity
reversal of the inductor current to maximize light load
conversion efficiency. DRVLSD can also be pulled low for
reverse voltage protection purposes.
Rev. A | Page 10 of 16
When DRVLSD is low, the low-side driver stays low. When
DRVLSD is high, the low-side driver is enabled and controlled
by the driver signals, as previously described.
LOW-SIDE DRIVER TIMEOUT
In normal operation, the DRVH signal tracks the IN signal and
turns off the Q1 high-side switch with a few 10 ns delay
(t
pdlDRVH
) following the falling edge of the input signal. When Q1
is turned off, DRVL is allowed to go high, Q2 turns on, and the
SW node voltage collapses to zero. But in a fault condition such
as a high-side Q1 switch drain-source short circuit, the SW
node cannot fall to zero, even when DRVH goes low. The
ADP3419 has a timer circuit to address this scenario. Every
time the IN goes low, a DRVL on-time delay timer is triggered.
If the SW node voltage does not trigger a low-side turn-on, the
DRVL on-time delay circuit does it instead, when it times out
with t
SW(TO)
delay. If Q1 is still turned on, that is, its drain is
shorted to the source, Q2 turns on and creates a direct short
circuit across the V
DCIN
voltage rail. The crowbar action causes
the fuse in the V
DCIN
current path to open. The opening of the
fuse saves the load (CPU) from potential damage that the high-
side switch short circuit could have caused.
CROWBAR FUNCTION
In addition to the internal low-side drive time-out circuit, the
ADP3419 includes a CROWBAR input pin to provide a means
for additional overvoltage protection. When CROWBAR goes
high, the ADP3419 turns off DRVH and turns on DRVL. The
crowbar logic overrides the overlap protection circuit, the
shutdown logic, the DRVLSD logic, and the UVLO protection
on DRVL. Thus, the crowbar function maximizes the overvolt-
age protection coverage in the application. The CROWBAR can
be either driven by the CLAMP pin of buck controllers, such as
the ADP3422, ADP3203, ADP3204, or ADP3205, or controlled
by an independent overvoltage monitoring circuit.
Table 4. ADP3419 Truth Table
CROWBAR
UVLO
SD
DRVLSD
L
L
H
H
L
L
H
H
L
L
H
L
L
L
H
L
L
L
L
*
L
H
*
*
H
L
*
*
H
H
*
*
* = Don’t Care.
IN
H
L
H
L
*
*
*
*
DRVH
H
L
H
L
L
L
L
L
DRVL
L
H
L
L
L
L
H
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3421 | Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs |
| ADP3421JRU | Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs |
| ADP3422 | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.35V) 8-TSSOP -40 to 110 |
| ADP3422JRU | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3502 | CDMA Power Management System |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP34200002RUR | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADP3421 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs |
| ADP3421JRU | 制造商:AD 制造商全稱:Analog Devices 功能描述:Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs |
| ADP3421JRU-REEL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADP3421JRU-REEL7 | 制造商:ON Semiconductor 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。