參數(shù)資料
型號: ADP3421
廠商: Analog Devices, Inc.
元件分類: DC/DC變換器
英文描述: Geyserville-Enabled DC-DC Converter Controller for Mobile CPUs
中文描述: 蓋瑟維爾啟用的DC - DC轉(zhuǎn)換器控制器的移動處理器
文件頁數(shù): 1/12頁
文件大小: 146K
代理商: ADP3421
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
ADP3421
Tel: 781/329-4700
Analog Devices, Inc., 2002
Geyserville-Enabled DC-DC
Converter Controller for Mobile CPUs
FEATURES
Meets Intel
Mobile Voltage Positioning Requirements
Lowest Processor Dissipation for Longest Battery Life
Best Transient Containment
Minimum Number of Output Capacitors
System Power Management Compliant
Fast, Smooth Output Transition During VID Code
Change
Programmable Current Limit
Power Good
Integrated LDO Controllers for Clock and I/O Supplies
Programmable UVLO
Soft Start with Restart Lock-In
APPLICATIONS
Geyserville-Enabled Core DC-DC Converters
Fixed Voltage Mobile CPU Core DC-DC Converters
Notebook/Laptop Power Supplies
Programmable Output Power Supplies
GENERAL DESCRIPTION
The ADP3421 is a hysteretic dc-dc buck converter controller
with two auxiliary linear regulator controllers. The ADP3421
provides a total power conversion control solution for a micro-
processor by delivering the core, I/O, and clock voltages. The
optimized low-voltage design is powered from the 3.3 V system
supply and draws only 10
μ
A maximum in shutdown. The main
output voltage is set by a 5-bit VID code. To accommodate the
transition time required by the newest processors for on-the-
fly VID changes, the ADP3421 features high-speed operation
to allow a minimized inductor size that results in the fastest change
of current to the output. To further allow for the minimum
number of output capacitors to be used, the ADP3421 features
active voltage positioning that can be optimally compensated
to ensure a superior load transient response. The main output
signal interfaces with the ADP3410 dual MOSFET driver,
which is optimized for high speed and high efficiency for driving
both the upper and lower (synchronous) MOSFETs of the
buck converter.
FUNCTIONAL BLOCK DIAGRAM
VHYS
VID3
VID4
LTB
LTI
LTO
CLSET
VID2
VID1
VID0
CLKDRV
CLKFB
IODRV
IOFB
CS–
GND
OUT
VCC
RAMP
REG
CS+
DACOUT
CORE
SSC
SSL
UVLO
PWRGD
SD
LEVEL
TRANSLATOR
EN
CORE
COMPARATOR
CORE CONTROLLER
ADP3421
CLOCK LDO
CONTROLLER
I/O LDO
CONTROLLER
VIN/VCC
MONITOR AND
UVLO BIAS
REFERENCE
CONTROLLER
BIAS AND
REFERENCE
BIAS EN
SOFT START
TIMER
AND
POWER GOOD
GENERATOR
VID DAC
CURRENT
LIMIT
COMPARATOR
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