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參數(shù)資料
| 型號(hào)： | ADP3367AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | 2nd Level Over Voltage Protection for 2, 3, or 4 Cell LiIon & LiPoly Batteries (2nd Lev Protection) 8-SM8 |
| 中文描述： | FIXED/ADJUSTABLE POSITIVE LDO REGULATOR, 0.5 V DROPOUT, PDSO8 |
| 封裝： | SOP-8 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 148K |
| 代理商： | ADP3367AR |
ADP3367
REV. 0
–3–
PIN FUNCT ION DE SCRIPT ION
Function
Mnemonic
DD
Dropout Detector Output. PNP collector output
which sources current as dropout is reached.
Voltage Regulator Input.
Ground Pin. Must be connected to 0 V.
Low Battery Detect Input. Compared with 1.255 V.
Low Battery Detect Output. Open Drain Output
that goes low when LBI is below the threshold.
Digital Input. May be used to disable the device
so that the power consumption is minimized.
Voltage Setting Input. Connect to GND for +5 V
output or connect to resistive divider for adjust-
able output.
Regulated Output Voltage. Connect to filter
capacitor.
V
IN
GND
LBI
LBO
SHDN
SET
OUT
DIP & SOIC PIN CONFIGURAT ION
DD
OUT
LBI
GND
IN
LBO
SET
SHDN
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADP3367
T E RMINOLOGY
Dropout Voltage:
T he input/output voltage differential at
which the regulator no longer maintains regulation against fur-
ther reductions in input voltage. It is measured when the output
decreases 100 mV from its nominal value. T he nominal value is
the measured value with V
IN
= V
OUT
+2 V.
Line Regulation
: T he change in output voltage as a result of a
change in the input voltage. It is specified for a change of input
voltage from 6 V to 10 V.
Load Regulation:
T he change in output voltage for a change
in output current. It is specified for an output current change
from 10 mA to 200 mA.
Quiescent Current (I
GND
):
T he input bias current which
flows into the regulator not including load current. It is mea-
sured on the GND line and is specified in shutdown and also for
different values of load current.
Shutdown:
T he regulator is disabled and power consumption
is minimized.
Dropout Detector:
An output that indicates that the regulator
is dropping out of regulation.
Maximum Power Dissipation:
T he maximum total device
dissipation for which the regulator will continue to operate
within specifications.
GE NE RAL INFORMAT ION
T he ADP3367 contains a micropower bandgap reference volt-
age source, an error amplifier A1, two comparators (C1, C2)
and a series PNP output pass transistor.
CIRCUIT DE SCRIPT ION
T he internal bandgap voltage reference is trimmed to 1.255V
and is used as a reference input to the error amplifier A1. T he
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external
resistors. When the SET input is at ground, the internal divider
provides the error amplifier’s feedback signal giving a +5V out-
put. When SET is at more than 50 mV above ground, compara-
tor C1 switches the error amplifier’s input directly to the SET
pin, and external resistors are used to set the output voltage.
T he external resistors are selected so that the desired output
voltage gives 1.255 V at the SET input.
T he output from the error amplifier supplies base current to the
PNP output pass transistor which provides output current. Up
to 300 mA output current is available provided that the device
power dissipation is not exceeded.
Comparator C2 compares the voltage on the Low Battery Input
(LBI) pin to the internal +1.255 V reference voltage. T he out-
put from the comparator drives an open drain FET connected
to the Low Battery Output pin, LBO. T he Low Battery T hresh-
old may be set using a suitable voltage divider connected to
LBI. When the voltage on LBI falls below 1.255 V, the open
drain output, LBO, is pulled low.
A shutdown (SHDN) input that can be used to disable the
error amplifier and hence the voltage output is also available.
T he supply current in shutdown is less than 0.75
μ
A.
ADP3367
IN
SHDN
LBO
LBI
GND
50mV
SET
DD
OUT
1.255V
REF
A1
C1
C2
Figure 1. ADP3367 Functional Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3404ARU | GSM Power Management System |
| ADP3404 | GSM Power Management System |
| ADP3405ARU | Replaced by BQ29412 : Voltage Protection for 2-,3-or,4-Cell Lion Batteries (2nd Protection) 8-TSSOP -20 to 85 |
| ADP3405 | Replaced by BQ29412 : Voltage Protection for 2-,3-or,4-Cell Lion Batteries (2nd Protection) 8-TSSOP -20 to 85 |
| ADP3408ARU-25 | GSM Power Management System |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3367AR-REEL | 制造商:Analog Devices 功能描述:LDO Regulator Pos 1.3V to 16V5V 0.2A 8-Pin SOIC N T/R |
| ADP3367AR-REEL7 | 制造商:Analog Devices 功能描述:LDO Regulator Pos 1.3V to 16V5V 0.2A 8-Pin SOIC N T/R |
| ADP3367ARZ | 功能描述:IC REG LDO 5V/ADJ .2A 8SOIC RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - 線性 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):正，固定式 輸出電壓:8V 輸入電壓:10.5 V ~ 23 V 電壓 - 壓降（標(biāo)準(zhǔn)）:1.7V @ 40mA 穩(wěn)壓器數(shù)量:1 電流 - 輸出:100mA（最小值） 電流 - 限制（最小）:- 工作溫度:0°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1075 (CN2011-ZH PDF) 其它名稱:296-24390-1 |
| ADP3367ARZ | 制造商:Analog Devices 功能描述:LDO 2.5-16.5V 0.3VDO 0.3A 8SOIC |
| ADP3367ARZ-REEL | 制造商:Analog Devices 功能描述:LDO Regulator Pos 1.3V to 16V5V 0.2A 8-Pin SOIC N T/R |
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