參數(shù)資料
型號: ADNV-6340
廠商: Avago Technologies Ltd.
英文描述: High Performance Laser Mouse Bundles
中文描述: 高性能激光鼠標(biāo)捆綁
文件頁數(shù): 15/52頁
文件大?。?/td> 997K
代理商: ADNV-6340
15
Synchronous Serial Port
The synchronous serial port is used to set and read pa-
rameters in the ADNS-6010, and to read out the motion
information. The serial port is also used to load PROM
data into the ADNS-6010.
The port is a four wire port. The host micro-controller al-
ways initiates communication; the ADNS-6010 never ini-
tiates data transfers. The serial port cannot be activated
while the chip is in power down mode (
NPD
low) or reset
(
RESET
high). SCLK, MOSI, and NCS may be driven directly
by a 3.3V output from a micro-controller, or they may be
driven by an open drain configuration by enabling on-
chip pull-up current sources. The open drain drive allows
the use of a 5V micro-controller without any level shifting
components. The port pins may be shared with other SPI
slave devices. When the NCS pin is high, the inputs are
ignored and the output is tri-stated.
The lines that comprise the SPI port are:
SCLK:
Clock input. It is always generated by the master
(the micro-controller.)
MOSI:
Input data. (Master Out/Slave In)
MISO:
Output data. (Master In/Slave Out)
NCS:
Chip select input (active low). NCS needs to be
low to activate the serial port; otherwise, MISO
will be high Z, and MOSI & SCLK will be ignored.
NCS can also be used to reset the serial port in
case of an error.
Figure 15. Relative Responsivity
Relative Responsivity for ADNS-6010
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
400
500
600
700
800
900
1000
Wavelength (nm)
R
Chip Select Operation
The serial port is activated after NCS goes low. If NCS
is raised during a transaction, the entire transaction is
aborted and the serial port will be reset. This is true
for all transactions including PROM download. After a
transaction is aborted, the normal address-to-data or
transaction-to-transaction delay is still required before
beginning the next transaction. To improve communica-
tion reliability, all serial transactions should be framed by
NCS. In other words, the port should not remain enabled
during periods of non-use because ESD and EFT/B events
could be interpreted as serial communication and put
the chip into an unknown state. In addition, NCS must
be raised after each burst-mode transaction is complete
to terminate burst-mode. The port is not available for
further use until burst-mode is terminated.
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