參數(shù)資料
型號： ADNS-3080
廠商： Avago Technologies Ltd.
英文描述： High-Performance Optical Mouse Sensor
中文描述： 高性能光學(xué)鼠標(biāo)傳感器
文件頁數(shù)： 11/39頁
文件大?。?/td> 655K
代理商： ADNS-3080
11
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V
DD3
=3.3V, fclk=24MHz.
Parameter
Symbol
Min.
Typical
Max.
VDD to RESET
t
OP
250
Data delay
after RESET
Input delay
after reset
Power Down
t
PD
2.1
Units
m
s
Notes
From VDD = 3.0V to RESET sampled
t
PU-RESET
35
ms
From RESET falling edge to valid motion data at
2000 fps and shutter bound 8290.
From RESET falling edge to inputs active (NPD,
MOSI, NCS, SCLK)
From NPD falling edge to initiate the power down
cycle at 500fps (tpd = 1 frame period + 100ms )
From NPD rising edge to valid motion data at
2000 fps and shutter bound 8290. Max assumes
surface change while NPD is low.
From NPD rising edge to all registers contain data
from new images at 2000fps (see Figure 10) .
T
IN-RST
500
m
s
ms
Wake from NPD
t
PUPD
75
ms
Data delay
after NPD
RESET pulse width
t
COMPUTE
3.1
ms
t
PW-RESET
10
m
s
MISO rise time
MISO fall time
MISO delay
afterSCLK
MISO hold time
MOSI hold time
t
r-MISO
t
f-MISO
t
DLY-MISO
40
40
200
200
120
ns
ns
ns
C
L
= 50pF
C
L
= 50pF
From SCLK falling edge to MISO data valid, no
load conditions
Data held until next falling SCLK edge
Amount of time data is valid after SCLK rising
edge
From data valid to SCLK rising edge
From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second data byte.
From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second address
byte.
From rising SCLK for last bit of the first data byte,
to falling SCLK for first bit of the second address
byte.
From rising SCLK for last bit of the address byte,
to falling SCLK for first bit of data being read. All
registers except Motion & Motion_Burst
From rising SCLK for last bit of the address byte, to
falling SCLK for first bit of data being read. Applies
to 0x02 Motion, and 0x50 Motion_Burst, registers
From NCS falling edge to first SCLK rising edge
From last SCLK falling edge to NCS rising edge,
for valid MISO data transfer
From NCS rising edge to MISO high-Z state
(see Figure 23 and 24)
t
hold-MISO
t
hold-MOSI
250
200
ns
ns
MOSI setup time
SPI time between
write commands
SPI time between
write and read
commands
SPI time between
read and subsequent
commands
SPI read
address-data
delay
SPI motion read
address-data
delay
NCS to SCLK active
SCLK to NCS inactive
t
setup-MOSI
t
SWW
120
50
ns
m
s
t
SWR
50
m
s
t
SRW
t
SRR
250
ns
t
SRAD
50
m
s
t
SRAD-MOT
75
m
s
t
NCS-SCLK
t
SCLK-NCS
120
120
ns
ns
NCS to MISO high-Z
SROM download and
frame capture
byte-to-byte delay
t
NCS-MISO
t
LOAD
250
ns
m
s
10
NCS to burst mode
exit
t
BEXIT
4
m
s
Time NCS must be held high to exit burst mode
Transient Supply
Current
I
DDT
85
mA
Max supply current during a V
DD3
ramp from 0 to
3.6V
相關(guān)PDF資料
PDF描述
ADNS-3150-001 Optical Mouse Designer’s Kit
ADNS-5020-EN Optical Mouse Sensor
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ADNS-5100 Solid-State Optical Mouse Lens
ADNS-5100-001 Solid-State Optical Mouse Lens
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