參數(shù)資料
型號(hào): ADNB-3081
英文描述: High-performance Optical Mouse Sensor
中文描述: 高性能的光學(xué)鼠標(biāo)傳感器
文件頁數(shù): 11/40頁
文件大小: 530K
代理商: ADNB-3081
11
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, V
DD3
=3.3V, fclk=24MHz.
Parameter
Symbol
Minimum Typical Maximum Units Notes
VDD to RESET
t
OP
250
μ
s
ms
From VDD = 3.0V to RESET sampled
Data delay after
RESET
Input delay after reset T
IN-RST
t
PU-RESET
35
From RESET falling edge to valid motion data at 2000
fps and shutter bound 8290.
From RESET falling edge to inputs active (NPD,
MOSI, NCS, SCLK)
From NPD falling edge to initiate the power down
cycle at 500fps (tpd = 1 frame period + 100ms )
From NPD rising edge to valid motion data at 2000
fps and shutter bound 8290. Max assumes surface
change while NPD is low.
From NPD rising edge to all registers contain data
from new images at 2000fps (see Figure 10) .
500
μ
s
Power Down
t
PD
2.1
ms
Wake from NPD
t
PUPD
75
ms
Data delay after NPD
t
COMPUTE
3.1
ms
RESET pulse width
t
PW-RESET
10
μ
s
ns
ns
ns
MISO rise time
MISO fall time
MISO delay after SCLK t
DLY-MISO
t
r-MISO
t
f-MISO
40
40
200
200
120
C
L
= 50pF
C
L
= 50pF
From SCLK falling edge to MISO data valid, no load
conditions
Data held until next falling SCLK edge
Amount of time data is valid after SCLK rising edge
From data valid to SCLK rising edge
From rising SCLK for last bit of the first data byte, to
rising SCLK for last bit of the second data byte.
From rising SCLK for last bit of the first data byte, to
rising SCLK for last bit of the second address byte.
MISO hold time
MOSI hold time
MOSI setup time
SPI time between
write commands
SPI time between
write and read
commands
SPI time between read
and subsequent
commands
SPI read address-data
delay
t
hold-MISO
t
hold-MOSI
t
setup-MOSI
t
SWW
250
200
120
50
ns
ns
ns
μ
s
t
SWR
50
μ
s
t
SRW
t
SRR
250
ns
From rising SCLK for last bit of the first data byte, to
falling SCLK for first bit of the second address byte.
t
SRAD
50
μ
s
From rising SCLK for last bit of the address byte, to
falling SCLK for first bit of data being read. All
registers except Motion & Motion_Burst
From rising SCLK for last bit of the address byte, to
falling SCLK for first bit of data being read. Applies to
0x02 Motion, and 0x50 Motion_Burst, registers
From NCS falling edge to first SCLK rising edge
From last SCLK falling edge to NCS rising edge, for
valid MISO data transfer
From NCS rising edge to MISO high-Z state
(see Figure 23 and 24)
SPI motion read
address-data delay
t
SRAD-MOT
75
μ
s
NCS to SCLK active
SCLK to NCS inactive
t
NCS-SCLK
t
SCLK-NCS
120
120
ns
ns
NCS to MISO high-Z
SROM download and
frame capture byte-to-
byte delay
NCS to burst mode
exit
Transient Supply
Current
t
NCS-MISO
t
LOAD
250
ns
μ
s
10
t
BEXIT
4
μ
s
Time NCS must be held high to exit burst mode
I
DDT
85
mA
Max supply current during a V
DD3
ramp from 0 to 3.6V
相關(guān)PDF資料
PDF描述
ADNB-3082 High-performance Optical Mouse Sensor
ADNS-2120 High-performance Optical Mouse Sensor
ADNS-2120-001 High-performance Optical Mouse Sensor
ADNS-2220 High-performance Optical Mouse Sensor
ADNS-2220-001 High-performance Optical Mouse Sensor
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