
ADMC401
–11–
REV. B
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C
×
V
DD
2
×
f
C
= load capacitance,
f
= output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as
follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DD
= 5.0 V and t
CK
= 38.5 ns.
Total Power Dissipation
=
P
INT
+
(C
×
V
DD2
×
f
)
P
INT
=
V
DD
×
(
I
DD
Digital
+
I
DD
Analog
)
(
C
×
V
DD2
×
f
) is calculated for each output:
# of
Pins
C
V
DD2
f
Address,
DMS
Data Output,
WR
RD
CLKOUT
8
9
1
1
×
10 pF
×
10 pF
×
10 pF
×
10 pF
×
5
2
V
×
5
2
V
×
5
2
V
×
5
2
V
×
26 MHz
×
13 MHz
×
13 MHz
×
26 MHz
= 52.00 mW
= 29.25 mW
=
3.25 mW
=
6.50 mW
91.00 mW
Total power dissipation for this example is P
INT
+ 91 mW.
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (t
DIS
) is the difference of t
MEASURED
and t
DECAY
,
as shown in the Output Enable/Disable diagram. The time is the
interval from when a reference signal reaches a high or low
voltage level to when the output voltages have changed by 0.5 V
from the measured output high or low voltage. The decay time,
t
DECAY
, is dependent on the capacitative load, C
L
, and the cur-
rent load,
i
L
, on the output pin. It can be approximated by the
following equation:
t
C
V
I
DECAY
L
L
=
×
0 5
from which
t
t
t
DIS
MEASURED
DECAY
=
is calculated. If multiple pins (such as the data bus) are dis-
abled, the measurement value is that of the last pin to stop
driving.
3.0V
1.5V
0.0V
2.0V
1.5V
0.3V
INPUT
OUTPUT
Figure 7. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Output Enable Time
Output pins are considered to be enabled when that have made
a transition from a high-impedance state to when they start
driving. The output enable time (t
ENA
) is the interval from when
a reference signal reaches a high or low voltage level to when
the output has reached a specified high or low trip point, as
shown in the Output Enable/Disable diagram. If multiple pins
(such as the data bus) are enabled, the measurement value is
that of the first pin to start driving.
2.0V
1.0V
t
ENA
REFERENCE
SIGNAL
OUTPUT
t
DECAY
V
(MEASURED)
OUTPUT STOPS
DRIVING
OUTPUT STARTS
DRIVING
t
DIS
t
MEASURED
V
(MEASURED)
V
OH
(MEASURED)
–
0.5V
V
OL
(MEASURED) +0.5V
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
V
(MEASURED)
V
(MEASURED)
Figure 8. Output Enable/Disable
TO
OUTPUT
PIN
50pF
+1.5V
I
OH
I
OL
Figure 9. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)