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參數(shù)資料
| 型號： | ADM1070ARTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/16頁 |
| 文件大?。?/td> | 336K |
| 描述： | IC CTRLR HOTSWAP -48V SOT23-6 |
| 產(chǎn)品培訓(xùn)模塊： | Hot Swap Design |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 熱交換控制器 |
| 應(yīng)用： | 通用 |
| 內(nèi)部開關(guān)： | 無 |
| 電源電壓： | -36 V ~ -77 V |
| 工作溫度： | -45°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-6 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-6 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 配用： | EVAL-ADM1073MEBZ-ND - BOARD EVALUATION FOR ADM1073 |
| 其它名稱： | ADM1070ARTZ-REEL7DKR |
REV. 0
ADM1070
13
CURRENT FAULT PLOTS
Some timing waveforms associated with current over faults are
shown in the following figures. Figure 9 shows how a current
glitch (of approximately 500 祍) is dealt with when the output is
shorted after power-up. The gate voltage is at a constant 12.3 V
before the glitch occurs. When the short circuit occurs, the
sense voltage rises sharply as the load current ramps up quickly.
When the sense voltage reaches 100 mV (V
ACL
), the ADM1070
reduces the gate voltage to stop the load current from increasing
any further. When V
SENSE
drops back below V
ACL
, the gate
voltage is increased again.
GATE
SENSE
V
OUT
CH3
10.00V
CH1
20.00V
CH2 100mV M 500s CH2
34mV
T
T
T
Figure 9. Timing Waveforms Associated with a
Current Glitch
The plots shown illustrate the operation of the ADM1070s
unique limited consecutive retry function. Figure 10 highlights
what happens when a current fault occurs for more than 14 ms
(default t
LIMITON
when TIMER Pin tied to V
EE
) and a current
fault is registered. In this case, gate is previously low and the
part is being powered up into a current fault situation (shorted
load). When power is applied, gate is allowed to ramp until
sense reaches 100 mV. gate is then held constant to keep sense
at this level. After t
ON
, the PWM cycle begins and gate is
reduced to zero.
5.00V CH2 100mV
M 5.00s
CH1
1.4V
CH1
GATE
SENSE
14ms
Figure 10. Timing Waveforms Associated with a
Current Fault
Figure 11 shows a current fault on a wider timebase. The first
spike on the sense line represents the first current fault. The
sense voltage is allowed to ramp up to 100 mV before the gate
voltage is reduced to compensate. The gate and sense voltages
remain at these levels until the t
ON
time has expired. A current
fault is then registered and the gate voltage, and therefore the
sense voltage, are then both held low for the time period t
OFF
.
Note that the PWM ratio (t
ON
/t
OFF
) is equal to 3%. The cycle
then restarts and the sense voltage is free to ramp up to 100 mV
again (it will if the fault is still present). This cycle repeats itself
a total of seven times. Figure 12 shows the seven consecutive
faults occurring on an even wider timebase. If the ADM1070
detects seven consecutive current faults, the part then latches off
(after a total time t
SHORT
).
GATE
ENSE
5.00V CH2
1.00V
CH3
100mV M 100ms
CH1
t
ON
t
OFF
Figure 11. Illustration of the PWM Ratio (t
ON
/t
OFF
)
GATE
SENSE
5.00V CH2
1.00V
CH3
100mV M 100ms
CH1
t
SHORT
Figure 12. Illustration of the Limited Consecutive
Retry Function (Seven Retries and Latch Off)
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| ADM1070EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:ADM1070 Hot Swap Controller Evaluation Kit Documentation |
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| ADM1073ARU | 功能描述:IC CTRLR HOTSWAP -48V 14TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:119 系列:- 類型:熱交換控制器 應(yīng)用:通用型，PCI Express? 內(nèi)部開關(guān):無 電流限制:- 電源電壓:3.3V，12V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-TQFP 供應(yīng)商設(shè)備封裝:80-TQFP（12x12） 包裝:托盤 產(chǎn)品目錄頁面:1423 (CN2011-ZH PDF) |
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