參數(shù)資料
型號: ADM1041AARQZ
廠商: ANALOG DEVICES INC
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Secondary-Side Controller with Current Share and Housekeeping
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO24
封裝: LEAD FREE, MO-137AE, QSOP-24
文件頁數(shù): 50/56頁
文件大?。?/td> 991K
代理商: ADM1041AARQZ
ADM1041A
Mnemonic
V
DD
OV
Extrefok_OK
Intrefok_OK
GND_OK
V
DD
_OK
Rev. 0 | Page 50 of 56
Description
If this flag is high, a V
DD
overvoltage has been sensed.
If this flag is low, the externally available reference on Pin 18 is overloaded.
If this flag is low, the internal reference has no integrity.
If this flag is low, ground (Pin 7) is open (either pin to PCB or pin to bond wires).
If this flag is low, V
DD
is below its UVL or the power mangement block has a
problem, a reference voltage, a ground fault, or a V
DD
overvoltage fault.
If this flag is low, the OrFET has an excessive reverse voltage.
If this flag is low, either PULSE_OK, penok, loadvok, or reverseok is false.
If this flag is low, the current-share accuracy is out of limits.
Fault latch. If this flag is high, either an ovfault, uvfault, or ocp has occured.
Pulses are present at AC
SENSE
1.
If this flag is high, an overcurrent has been sensed and the ocp timer has
started.
This flag indicates the status of the DC_OK pin.
This flag indicates the status of the PS
ON
LINK pin.
This flag indicates the status of the PEN pin.
This flag indicates the status of the PSON pin.
This flag indicates the status of the AC
SENSE
1/AC
SENSE
2 pin.
Latched status of MON5 flag.
Latched status of MON4 flag.
Latched status of MON3 flag.
Latched status of MON2 flag.
Latched status of MON1 flag.
Latched OCP timeout.
Latched uvfault.
Latched ovfault.
Latched vddov fault.
Latched extref fault.
Latched intref fault.
Latched gnd fault.
Latched V
DD
fault.
Latched reverse voltage fault.
Latched orfet fault.
Latched share fault.
Latched fault.
Latched pulse fault.
Latched ocpf fault.
Latched DC_OK fault.
Latched PS
ON
LINKfault.
Latched PEN fault.
Latched PSON fault.
Latched AC
SENSE
fault.
Register
01h
01h
01h
01h
01h
Bit
0
1
2
3
4
Read/Write
Read only
Read-only
Read-only
Read-only
Read-only
REVERSE_OK
OrFET_OK
Share_OK
Fault
PULSE_OK
ocpf
01h
01h
01h
02h
02h
02h
5
6
7
0
1
2
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
m_DC_OK_r
m_psonok_r
m_penok_r
m_pson_r
m_acsns_r
Mon5 Flag Latch
Mon4 Flag Latch
Mon3 Flag Latch
Mon2 Flag Latch
Mon1 Flag Latch
OCP Timeout Latch
UV Fault Latch
OV Fault Latch
V
DD
OV Latch
extrefok Latch
intrefok Latch
GND OK Latch
V
DD
OK Latch
Reverse OK Latch
OrFET OK Latch
Share_OK Latch
Fault
PULSE_OK Latch
OCP Latch
m_DC_OK_r Latch
m_psonok_r Latch
m_penok_r Latch
m_pson_r Latch
m_acsns_r Latch
02h
02h
02h
02h
02h
2Ah
2Ah
2Ah
2Ah
2Ah
2Ah
2Ah
2Ah
2Bh
2Bh
2Bh
2Bh
2Bh
2Bh
2Bh
2Bh
2Ch
2Ch
2Ch
2Ch
2Ch
2Ch
2Ch
2Ch
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
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