參數(shù)資料
型號(hào)： ADM1041AARQZ-REEL7
廠商： ANALOG DEVICES INC
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Secondary-Side Controller with Current Share and Housekeeping
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO24
封裝： LEAD FREE, MO-137AE, QSOP-24
文件頁(yè)數(shù)： 49/56頁(yè)
文件大小： 991K
代理商： ADM1041AARQZ-REEL7
ADM1041A
MICROPROCESSOR SUPPORT
Possible ways to turn the ADM1041A on or off in response to a system request or a fault include the following:
Daisy-chaining other ADM1041A PSON pins to the PEN pin, which is controlled by PSON on one ADM1041A.
Use a microprocessor to control the PSON, the system interface, and any shutdowns due to faults.
Connect all AC_OKLink pins together and connect all PS
ON
LINK pins together. These pins must be configured appropriately.
Rev. 0 | Page 49 of 56
Flags appended with _L are latched (Registers 2Ah/2Bh/2Ch). The latch is reset when the flag is read, except when the fault is still present.
It is advisable to continue reading the flag(s) until the fault(s) have cleared.
Table 43.
Mnemonic
Description
m_pson_r
Allows the microprocessor to read the state of PSON. This allows only one
ADM1041A to be configured as the PSON interface to the host system.
Micro PS_ON
Allows the microprocessor to write to control the PSON function of each
ADM1041A. When in microprocessor support mode, the principle
configuration for controlling power-on/power-off is as follows. One
ADM1041A is configured as the interface to the host system through the
standard PSON pin. This pin is configured not to write through to the PSON
debounce block. The microprocessor polls the status of this ADM1041A by
reading m_pson_r. Debouncing is done by the microprocessor. If m_pson_r
changed state, the microprocessor writes the new state to m_pson_w in all
ADM1041As on the SMBus. If a fault occurs on any output, the SMBAlert
interrupt requests microprocessor attention. If this means turning all
ADM1041As off, this is done by writing a zero to the m_pson_w bit.
m_acsns_r
Allows the microprocessor to read the state of AC
SENSE
1/AC
SENSE
2. This allows
one ADM1041A to be configured as the interface to the host power supply.
Micro AC SENSE
Allows the microprocessor to write to control the AC
SENSE
function of each
ADM1041A. When in microprocessor support mode the principle configuration
for controlling AC_OK, undervoltage blanking, PEN gating, and RAMP/SS
gating is as follows. One ADM1041A is configured to be the interface with the
host power supply AC monitoring circuitry. This ADM1041A can be configured
so that the acsns signal is written through or would not be written through.
Regardless, the microprocessor monitors m_acsns_r and write to m_acsns_w
as appropriate. Because it is possible to sense but not to write through, it is
possible to configure a second ADM1041A to monitor a second ac or bulk
voltage.
Micro Share Clamp
Allows the μP to write directly to m_shr_clmp to control when the ISHARE
clamp is released. During a hot-swap insertion, there may be a need to delay
the release of the ISHARE clamp. This allows the designer an option over the
default release at 75% or 88% of the reference ramp (soft start).
Micro CBD Write
Allows the microprocessor to write directly to CBD as a possible way of adding
an additional output port. This might be for blinking LEDs or as a fault signal to
the system.
Micro CBD Clear
Allows the microprocessor to clear the CBD latch following an SMBalert. If CBD
is configured to be latching, there may be circumstances that lead to
CBD/SMBAlert being set by, for example, one of the MON flags, but does not
lead to PSON being cycled and CBD being reset. In this case, the
microprocessor needs to write directly to CBD to reset the latch.
Mon5 Flag
This flag indicates the status of the MON5 pin.
Mon4 Flag
This flag indicates the status of the MON4 pin.
Mon3 Flag
This flag indicates the status of the MON3 pin.
Mon2 Flag
This flag indicates the status of the MON2 pin.
Mon1 Flag
This flag indicates the status of the MON1 pin.
OCP Timeout
If this flag is high, an overcurrent has occurred and timed out.
UV Fault
If this flag is high, an undervoltage has been sensed
OV Fault
If this flag is high, an overvoltage has been sensed.
Register
02h
Bit
6
Read/Write
Read-only
12h
1
Read/Write
02h
7
Read-only
12h
5
Read/Write
13h
2
Read/Write
13h
1
Read/Write
13h
0
Read/Write
00h
00h
00h
00h
00h
00h
00h
00h
0
1
2
3
4
5
6
7
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
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