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| 型號： | ADM1031ARQZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT |
| 封裝： | LEAD FREE, MO-137AB, QSOP-16 |
| 文件頁數(shù)： | 3/36頁 |
| 文件大小： | 596K |
| 代理商： | ADM1031ARQZ-REEL |
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ADM1031
Rev. B | Page 11 of 36
START BY
MASTER
STOP BY
MASTER
ACK. BY
ADM1031
ACK. BY
ADM1031
ACK. BY
ADM1031
0
11
9
1
0
1
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
SCL
SDA
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
FRAME 3
DATA BYTE
9
SDA (CONTINUED)
SCL (CONTINUED)
9
1
D7
D6
D5
D4
D3
D2
D1
D0
02402-016
Figure 16. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
STOP BY
MASTER
ACK. BY
ADM1031
ACK. BY
ADM1031
START BY
MASTER
SCL
11
9
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
9
0
1
0
1
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
SDA
02402-017
Figure 17. Writing to the Address Pointer Register Only
STOP BY
MASTER
ACK. BY
ADM1031
NO ACK.
BY MASTER
START BY
MASTER
SCL
11
9
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM1031
9
0
1
0
1
A1
A0
R/W
D7
D6
D5
D4
D3
D2
D1
D0
SDA
02402-018
Figure 18. Reading Data from a Previously Selected Register
ALERT RESPONSE ADDRESS
Alert Response Address (ARA) is a feature of SMBus devices
that allows an interrupting device to identify itself to the host
when multiple devices exist on the same bus.
The INT output can be used as an interrupt output or can be
used as an SMBALERT. One or more INT outputs can be
connected to a common SMBALERT line connected to the
master. If a device’s INT line goes low, the following procedure
occurs:
1.
SMBALERT is pulled low.
2.
Master initiates a read operation and sends the Alert
Response Address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
3.
The device whose INT output is low responds to the alert
response address, and the master reads its device address.
The address of the device is now known and can be
interrogated in the usual way.
4.
If more than one device’s INT output is low, the one with
the lowest device address has priority, in accordance with
normal SMBus arbitration.
5.
Once the ADM1031 has responded to the alert response
address, it resets its INT output. However, if the error
condition that caused the interrupt persists, then INT is
reasserted on the next monitoring cycle.
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