參數(shù)資料
型號: ADL5375-15ACPZ-R7
廠商: ANALOG DEVICES INC
元件分類: 調(diào)制器/解調(diào)器
英文描述: 400 MHz - 6000 MHz RF/MICROWAVE I/Q MODULATOR
封裝: 4 X 4 MM, ROHS COMPLIANT, MO-220-VGGD-8, LFCSP-24
文件頁數(shù): 29/32頁
文件大?。?/td> 1247K
代理商: ADL5375-15ACPZ-R7
ADL5375
Rev. A | Page 6 of 32
Parameter
Conditions
ADL5375-05
ADL5375-15
Unit
Min
Typ
Max
Min
Typ
Max
LO = 5800 MHz
Output Power, POUT
VIQ = 1 V p-p differential
2.40
0.82
dBm
Modulator Voltage Gain
RF output divided by baseband input voltage
1.6
3.2
dB
Output P1dB
5.7
6.6
dBm
Output Return Loss
11.4
10.5
dB
Carrier Feedthrough
23.0
16.3
dBm
Sideband Suppression
36.0
33.0
dBc
Quadrature Error
1.42
+1.17
Degrees
I/Q Amplitude Balance
0.20
0.50
dB
Second Harmonic
POUT (fLO + (2 × fBB))
57
58
dBc
ADL5375-05
POUT = 2.40 dBm
ADL5375-15
POUT = 0.82 dBm
Third Harmonic
POUT (fLO + (3 × fBB))
43
52
dBc
ADL5375-05
POUT = 2.40 dBm
ADL5375-15
POUT = 0.82 dBm
Output IP2
f1BB = 3.5 MHz, f2BB = 4.5 MHz,
POUT ≈ 5 dBm @ fLO = 900 MHz
38.7
35.7
dBm
Output IP3
f1BB = 3.5 MHz, f2BB = 4.5 MHz,
POUT ≈ 5 dBm @ fLO = 900 MHz
13.5
12.1
dBm
Noise Floor
I/Q inputs = 0 V differential with a dc bias
only, 20 MHz carrier offset
153.0
153.4
dBm/Hz
LO INPUTS
LO Drive Level
Characterization performed at typical level
6
0
+7
6
0
+7
dBm
Input Return Loss
500 MHz < fLO < 3.3 GHz
See Figure 7 and Figure 32 for return loss vs.
frequency
≤10
dB
BASEBAND INPUTS
Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN
I/Q Input Bias Level1
500
1500
mV
Absolute Voltage Level1
On Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN
0
1
2
V
Input Bias Current
Current sourcing from each baseband input
41
32
μA
Input Offset Current
0.1
μA
Differential Input
Impedance
60
100
Bandwidth (0.1 dB)
LO = 1900 MHz, baseband input =
500 mV p-p sine wave
95
80
MHz
OUTPUT DISABLE
Pin DSOP
Off Isolation
POUT (DSOP high) – POUT (DSOP low)
86
85
dB
DSOP low, LO leakage, LO = 2150 MHz
53
dBm
Turn-On Settling Time
DSOP high to low (90% of envelope)
200
ns
Turn-Off Settling Time
DSOP low to high (10% of envelope)
100
ns
DSOP High Level (Logic 1)
2.0
V
DSOP Low Level (Logic 0)
0.8
V
POWER SUPPLIES
Pin VPS1 and Pin VPS2
Voltage
4.75
5.25
4.75
5.25
V
Supply Current
DSOP = high
200
mA
DSOP = low
131
mA
1 The input bias level can vary as long as the voltages on the individual IBBP, IBBN, QBBP, and QBBN pins remain within the specified absolute voltage level.
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