參數(shù)資料
型號: ADJD-J823
廠商: Avago Technologies Ltd.
英文描述: Color Management Controller with Integrated RGB Photosensor
中文描述: 色彩管理控制器集成RGB光
文件頁數(shù): 3/18頁
文件大?。?/td> 275K
代理商: ADJD-J823
3
Pin Information
PIN
1
2
NAME
NC
PWMB
TYPE
No connect
Output
DESCRIPTION
No connect. Leave floating.
PWMB is the active-high blue pulse width modulation output pin.
Tie it to the blue LED driver channel.
PWMG is the active-high green pulse width modulation output pin.
Tie it to the green LED driver channel.
PWMR is the active-high red pulse width modulation output pin.
Tie it to the red LED driver channel.
Tie to digital ground.
Tie to digital ground.
Digital power pin.
Tie to analog ground.
CLKIO outputs a reference internal clock signal.
Global, asynchronous, active low system reset.
When asserted low, XRST resets all registers.
Minimum reset pulse low is 10us and must be provided by external
circuitry.
SDASLV and SCLSLV are the serial interface communications pins.
SDASLV is the bidirectional data pin and SCLSLV is the interface clock.
A pull-up resistor should be tied to SDASLV because it goes tri-state to
output logic 1.
An external serial I2C EEPROM can be connected to the device to store
calibration and configuration data. SDAPROM and SCLPROM should be
tied to the I2C data (SDA) and clock (SCL) pins of the EEPROM. A pull-up
resistor should be tied to SDAPROM because it goes tri-state to output
logic 1.
When SLEEP=1, the device goes into sleep mode. In sleep mode, all
analog circuits are powered down and the clock signal is gated away from
the core logic resulting in very low current consumption.
Tie to analog ground.
Tie to analog ground.
Tie to analog ground.
Analog power pin.
No connect. Leave floating.
3
PWMG
Output
4
PWMR
Output
5
6
7
8
9
10
DGND
DGND
DVDD
AGND
CLKIO
XRST
Ground
Ground
Power
Ground
Output
Input
11
12
SCLSLV
SDASLV
Input
Input/Output
(tri-state high)
13
SCLPROM
Output
14
SDAPROM
Input/Output
(tri-state high)
15
SLEEP
Input
16
17
18
19
20
AGND
AGND
AGND
AVDD
NC
Ground
Ground
Ground
Power
No connect
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