參數(shù)資料
型號: ADG802BRM
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: <0.5 ohm CMOS, Low Voltage, SPST Switches
中文描述: 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO8
封裝: MO-187AA, MSOP-8
文件頁數(shù): 5/9頁
文件大?。?/td> 76K
代理商: ADG802BRM
ADG801/ADG802
–5–
REV. PrE
PRELIMINARY TECHNICAL DATA
T E RMINOLOGY
V
DD
I
DD
GND
S
D
IN
V
D
(V
S
)
R
ON
R
FLAT (ON)
Most positive power supply potential.
Positive supply current.
Ground (0 V) reference.
Source terminal. May be an input or output.
Drain terminal. May be an input or output.
Logic control input.
Analog voltage on terminals D, S
Ohmic resistance between D and S.
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured
over the specified analog signal range.
Source leakage current with the switch
OFF.
Drain leakage current with the switch
OFF.
Channel leakage current with the switch
ON.
Maximum input voltage for logic
0
.
Minimum input voltage for logic
1
.
Input current of the digital input.
OFF
switch source capacitance. Measured with reference to ground.
OFF
switch drain capacitance. Measured with reference to ground.
ON
switch capacitance. Measured with reference to ground.
Digital input capacitance.
Delay between applying the digital control input and the output switching on. See T est Circuit 4.
Delay between applying the digital control input and the output switching off.
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
INL
V
INH
I
INL
(I
INH
)
C
S
(OFF)
C
D
(OFF)
C
D
,C
S
(ON)
C
IN
t
ON
t
OFF
Charge
Injection
Off Isolation
Crosstalk
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
A measure of unwanted signal coupling through an
OFF
switch.
A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic
capacitance.
T he frequency at which the output is attenuated by 3dBs.
On Response T he Frequency response of the
ON
switch.
Insertion
T he loss due to the ON resistance of the switch.
Loss
Bandwidth
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相關代理商/技術參數(shù)
參數(shù)描述
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