VSS S1A S4A S3A S2A A0" />
參數(shù)資料
型號(hào): ADG1409YRUZ-REEL7
廠商: Analog Devices Inc
文件頁(yè)數(shù): 3/20頁(yè)
文件大?。?/td> 0K
描述: IC MULTIPLEXER DUAL 4X1 16TSSOP
產(chǎn)品培訓(xùn)模塊: Switch Fundamentals
標(biāo)準(zhǔn)包裝: 1,000
系列: iCMOS®
功能: 多路復(fù)用器
電路: 2 x 4:1
導(dǎo)通狀態(tài)電阻: 8 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 5 V ~ 16.5 V,±2.25 V ~ 8.25 V
電流 - 電源: 220µA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
ADG1408/ADG1409
Rev. B | Page 11 of 20
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
EN
VSS
S1A
S4A
S3A
S2A
A0
GND
VDD
S1B
S4B
DA
DB
S3B
S2B
A1
ADG1409
TOP VIEW
(Not to Scale)
0
48
61
-00
4
Figure 4. ADG1409 Pin Configuration (TSSOP)
PIN 1
INDICATOR
1
VSS
2
S1A
3
S2A
4
S3A
11 S1B
12 VDD
10 S2B
9S3B
5
S
4A
6
D
A
7
D
B
8
S
4B
15
A
0
16
E
N
14
A
1
13
G
N
D
TOP VIEW
(Not to Scale)
ADG1409
04
86
1-
0
5
NOTES
1. THE EXPOSED PAD IS
CONNECTED INTERNALLY. FOR
INCREASED RELIABILITY OF THE
SOLDER JOINTS AND MAXIMUM
THERMAL CAPABILITY, IT IS
RECOMMENDED THAT THE PAD BE
SOLDERED TO THE SUBSTRATE, VSS.
Figure 5. ADG1409 Pin Configuration (LFCSP)
Table 10. ADG1409 Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic
Description
1
15
A0
Logic Control Input.
2
16
EN
Active High Digital Input. When low, the device is disabled and all switches are off. When high,
Ax logic inputs determine on switches.
3
1
VSS
Most Negative Power Supply Potential. In single supply applications, it can be connected
to ground.
4
2
S1A
Source Terminal 1A. Can be an input or an output.
5
3
S2A
Source Terminal 2A. Can be an input or an output.
6
4
S3A
Source Terminal 3A. Can be an input or an output.
7
5
S4A
Source Terminal 4A. Can be an input or an output.
8
6
DA
Drain Terminal A. Can be an input or an output.
9
7
DB
Drain Terminal B. Can be an input or an output.
10
8
S4B
Source Terminal 4B. Can be an input or an output.
11
9
S3B
Source Terminal 3B. Can be an input or an output.
12
10
S2B
Source Terminal 2B. Can be an input or an output.
13
11
S1B
Source Terminal 1B. Can be an input or an output.
14
12
VDD
Most Positive Power Supply Potential.
15
13
GND
Ground (0 V) Reference.
16
14
A1
Logic Control Input.
EP
Exposed
Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 11. ADG1409 Truth Table
A1
A0
EN
On Switch Pair
X
0
None
0
1
0
1
2
1
0
1
3
1
4
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