參數(shù)資料
型號(hào): ADDAC80-CCD-V
廠商: Analog Devices Inc
文件頁數(shù): 3/16頁
文件大小: 0K
描述: IC DAC 12BIT LOW COST 24-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 2µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 300mW
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 24-CDIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 24-CDIP 側(cè)面鍍銅
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
REV. B
ADDAC80/ADDAC85/ADDAC87
–11–
VOLTAGE OUTPUT MODELS
Internal scaling resistors provided in the ADDAC80 may be
connected to produce bipolar output voltage ranges of
±10 V,
±5 V or ±2.5 V or unipolar output voltage ranges of 0 V to +5 V
or 0 V to +10 V (see Figure 9).
REF
INPUT
TO REF
CONTROL
CIRCUIT
FROM
WEIGHTED
RESISTOR
NETWORK
SUMMING
JUNCTION
6.3k
5k
18
20
16
+
OUTPUT
COM
BIPOLAR
OFFSET
21
15
19
17
Figure 9. Output Amplifier Voltage Range Scaling Circuit
Gain and offset drift are minimized in the ADDAC80 because
of the thermal tracking of the scaling resistors with other device
components. Connections for various output voltage ranges are
shown in Table III. Settling time is specified for a full-scale
range change: 4 s for a 10 k
feedback resistor; 3 s for a 5 k
feedback resistor when using the compensation capacitor shown
in Figure 3a.
The equivalent resistive scaling network and output circuit of
the current model are shown in Figures 10 and 11. External RLS
resistors are required to produce exactly 0 V to –2 V or
± 1 V
output. TCR of these resistors should be
±100 ppm/°C or less
to maintain the ADDAC80 output specifications. If exact output
ranges are not required, the external resistors are not needed.
17
TO REF CONTROL CIRCUIT
6.3k
3k
2k
19
20
16
18
REF IN
5k
15
Figure 10. Internal Scaling Resistors
6.3k
BIPOLAR OFFSET
REFERENCE
INPUT
IOUT
COMMON
REFERENCE OUT
6.6k
V
TO REF
CONTROL
CIRCUIT
17
16
I
0 TO 2mA
6.3V
24
21
15
+
Figure 11. ADDAC80 Current Model Equivalent Output Circuit
Internal resistors are provided to scale an external op amp or to
configure a resistive load to offer two output voltage ranges of
±1 V
or 0 V to –2 V. These resistors (RLI TCR = 20 ppm/
°C) are an
integral part of the ADDAC80 and maintain gain and bipolar
offset drift specifications. If the internal resistors are not used, exter-
nal RL (or RF) resistors should have a TCR of
±25 ppm/°C or
less to minimize drift. This will typically add
±50 ppm/°C + the
TCR of RL (or RF) to the total drift.
Table III. Output Voltage Range Connections, Voltage Model ADDAC80
Output
Digital
Connect
Range
Input Codes
Pin 15 to
Pin 17 to
Pin 19 to
Pin 16 to
±10 V
COB or CTC
19
20
15
24
±5 V
COB or CTC
18
20
NC
24
±2.5 V
COB or CTC
18
20
24
0 V to 10 V
CSB
18
21
NC
24
0 V to 5 V
CSB
18
21
20
24
0 V to 10 V
CCD
19
NC
15
24
NC = No Connect
DRIVING A RESISTIVE LOAD UNIPOLAR
A load resistance, RL = RLI, + RLS, connected as shown in
Figure 12 will generate a voltage range, VOUT, determined by:
VmA
kR
OUT
L
=
×
+
.
2
66
(1)
where RL max = 1.54 k
and V
OUT max = –2.5 V
To achieve specified drift, connect the internal scaling resistor
(RLI) as shown in Table IV to an external metal film trim resistor
(RLS) to provide full scale output voltage range of 0 V to –2 V.
With RLS = 0 V, VOUT = –1.69 V.
0 TO
2mA
CURRENT CONTROLLED
BY DIGITAL INPUT
6.6k
RLI
968
COMMON
VOUT
RLS
+
15
18
21
Figure 12. Equivalent Circuit ADDAC80-CBI-I Connected
for Unipolar Voltage Output with Resistive Load
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