參數(shù)資料
型號(hào): ADDAC80-CCD-V
廠商: Analog Devices Inc
文件頁(yè)數(shù): 12/16頁(yè)
文件大?。?/td> 0K
描述: IC DAC 12BIT LOW COST 24-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 2µs
位數(shù): 12
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 300mW
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 24-CDIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 24-CDIP 側(cè)面鍍銅
包裝: 管件
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): *
REV. B
–5–
ADDAC80/ADDAC85/ADDAC87
ADDAC85LD
ADDAC85MIL
ADDAC87
Model
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
TECHNOLOGY
Hybrid
DIGITAL INPUT
Binary–CBI
12
Bits
BCD–CCD
Digits
Logic Levels (TTL Compatible)
VIH (Logic “1”)
2.0
5.5
2.0
5.5
2.0
5.5
V
VIL (Logic “0”)
0
0.8
0
0.8
0
0.8
V
IIH (VIH = 5.5 V)
250
A
IIL (VIL = 0.8 V)
–100
A
TRANSFER CHARACTERISTICS
ACCURACY
Linearity Error @ 25
°C
CBI
±1/2
±1/4
±1/2
LSB
1
CCD
LSB
TA @ TMIN to TMAX
±1/2
±3/4
LSB
Differential Linearity Error @ 25
°C
CBI
±1/2
LSB
CCD
LSB
TA @ TMIN to TMAX
±1
LSB
Gain Error
2
±0.1
±0.2
%FSR
3
Offset Error
2
±0.05
±0.05 ±0.1
%FSR
3
Temperature Range for Guaranteed
Monotonicity
–25
+85
–55
+125
–55
+125
°C
DRIFT (TMIN to TMAX)
Total Bipolar Drift, max (includes gain,
offset, and linearity drifts)
±15
±30
ppm of FSR/
°C
Total Error (TMIN to TMAX)
4
Unipolar
±0.13 ±0.30
% of FSR
Bipolar
±0.12 ±0.24
% of FSR
Gain
Including Internal Reference
±10
±20
±10
±25
ppm of FSR/
°C
Excluding Internal Reference
±5
±10
ppm of FSR/
°C
Unipolar Offset
±1
±2
±1
±3
ppm of FSR/
°C
Bipolar Offset
±5
±10
±5
±10
ppm of FSR/
°C
CONVERSION SPEED
Voltage Model (V)
5
Settling Time to
±0.01% of FSR
for FSR change (2 k
500 pF load)
with 10 k
Feedback
5
s
with 5 k
Feedback
3
s
For LSB Change
1.5
s
Slew Rate
20
V/
s
Current Model (I)
Settling Time to
±0.01% of FSR
for FSR Change
10
to 100 Load
300
ns
for 1 k
111
s
ANALOG OUTPUT
Voltage Models
Ranges–CBI
±2.5, ±5,
±10, +5,
+10
V
Ranges–CCD
V
Output Current
±5
±5mA
Output Impedance (dc)
0.05
Short Circuit Duration
Indefinite to Common
Current Models
Ranges–Unipolar
–2.0
mA
Ranges–Bipolar
±1.0
mA
Output Impedance
Bipolar
3.2
2.5
3.2
4.1
k
Unipolar
6.6
5.0
6.6
8.2
k
Compliance
–2.5, +10
–1.5, +10
V
Internal Reference Voltage (VR)
6.17
6.3
6.43
6.17
6.3
6.43
6.17
6.3
6.43
V
Output Impedance
1.5
Max External Current
6
2.5
mA
Tempco of Drift
±10
±20
±10
±20
±5
±10
ppm of VR/
°C
POWER SUPPLY SENSITIVITY
±15 V ± 10%, 5 V supply when applicable
±0.002
±0.002 ±0.003
% of FSR/%VS
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