參數(shù)資料
型號(hào)： ADDAC80-CBI-V
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 10/16頁(yè)
文件大?。?/td> 0K
描述： IC DAC 12BIT LOW COST 24-CDIP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝： 1
設(shè)置時(shí)間： 2µs
位數(shù)： 12
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 雙 ±
功率耗散（最大）： 300mW
工作溫度： 0°C ~ 70°C
安裝類型： 通孔
封裝/外殼： 24-CDIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 24-CDIP 側(cè)面鍍銅
包裝： 管件
輸出數(shù)目和類型： 1 電壓，單極；1 電壓，雙極
采樣率（每秒）： *
REV. B
–3–
ADDAC80/ADDAC85/ADDAC87
ADDAC80
ADDAC85
ADDAC87
Model
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
TEMPERATURE RANGE
Specifications
0
+70
–25
+85
–55
+125
°C
Operating
–25
+85
–55
+125
–55
+125
°C
Storage
–25
+125
–65
+150
–65
+150
°C
NOTES
1Least Significant Bit.
2Adjustable to zero with external trim potentiometer.
3FSR means “Full Scale Range” and is 20 V for the
±10 V range and 10 V for the ±5 V range.
4Gain and offset errors adjusted to zero at 25
°C.
5C
F = 0, see Figure 3a.
6Maximum with no degradation of specification, must be a constant load.
7A minimum of
±12.3 V is required for a ±10 V full scale output and ± 11.4 V is required for all other voltage ranges.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
Specifications subject to change without notice.
ADDAC80
ADDAC85
ADDAC87
Model
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
TECHNOLOGY
Hybrid
DIGITAL INPUT
Binary–CBI
12
Bits
BCD–CCD
3
Digits
Logic Levels (TTL Compatible)
VIH (Logic “1”)
2.0
5.5
2.0
5.5
2.0
5.5
V
VIL (Logic “0”)
0
0.8
0
0.8
0
0.8
V
IIH (VIH = 5.5 V)
250
A
IIL (VIL = 0.8 V)
–100
A
TRANSFER CHARACTERISTICS
ACCURACY
Linearity Error @ 25
°C
CBI
±1/4
±1/2
LSB
1
CCD
±1/8
±1/4
LSB
TA @ TMIN to TMAX
±1/4
±1/2
±1/4
±1/2
LSB
Differential Linearity Error @ 25
°C
CBI
±1/2
±3/4
±1/2
LSB
CCD
±1/4
±1/2
LSB
TA @ TMIN to TMAX
±1
LSB
Gain Error
2
±0.1
±0.3
±0.1
%FSR
3
Offset Error
2
±0.05 ±0.15
±0.05
%FSR
3
Temperature Range for Guaranteed
Monotonicity
0
+70
0
+70
–25
+85
°C
DRIFT (TMIN to TMAX)
Total Bipolar Drift, max (includes gain,
offset, and linearity drifts)
±20
ppm of FSR/
°C
Total Error (TMIN to TMAX)
4
Unipolar
±0.08 ±0.15
% of FSR
Bipolar
±0.06 ±0.10
% of FSR
Gain
Including Internal Reference
±15
±30
±20
ppm of FSR/
°C
Excluding Internal Reference
±5
±7
±10
ppm of FSR/
°C
Unipolar Offset
±1
±3
±1
ppm of FSR/
°C
Bipolar Offset
±5
±10
ppm of FSR/
°C
CONVERSION SPEED
Voltage Model (V)
5
Settling Time to
±0.01% of FSR for
FSR Change (2 k
500 pF load)
with 10 k
Feedback
5
s
with 5 k
Feedback
3
s
For LSB Change
1.5
s
Slew Rate
10
15
20
V/
s
Current Model (I)
Settling time to
±0.01% of FSR for
FSR Change
10
to 100 Load
300
ns
for 1 k
111
s
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADDAC80CBI-V 制造商:AD 功能描述:_
ADDAC80-CCD-I 制造商:Analog Devices 功能描述:DAC 1-CH Current Steering 12-bit 24-Pin SBCDIP Tube 制造商:Rochester Electronics LLC 功能描述:12-BIT GEN'L PURPOSE D - Bulk
ADDAC80-CCD-V 功能描述:IC DAC 12BIT LOW COST 24-CDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時(shí)間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:*
ADDAC80D-CBI-I 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, CDIP24
ADDAC80DCBIV 制造商:AD 制造商全稱:Analog Devices 功能描述:COMPLETE LOW COST 12-BIT D/A CONVERTERS
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