參數(shù)資料
型號: ADC12L038CIWM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: ADC
英文描述: 3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
中文描述: 8-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO28
封裝: SOP-28
文件頁數(shù): 32/36頁
文件大?。?/td> 828K
代理商: ADC12L038CIWM
Application Hints
(Continued)
The assignment of the RS232 port is shown below
B7
X
X
B6
X
X
B5
X
X
B4
CTS
0
B3
X
X
B2
X
X
B1
X
RTS
B0
X
DTR
COM1
Input Address
Output Address
3FE
3FC
A sample program, written in Microsoft
QuickBasic, is
shown on the next page. The program prompts for data
mode select instruction to be sent to the A/D. This can be
found from the Mode Programming table shown earlier. The
data should be entered in “1”s and “0”s as shown in the table
with DI0 first. Next the program prompts for the number of
SCLKs required for the programmed mode select instruction.
For instance, to send all “0”s to the A/D, selects CH0 as the
+input, CH1 as the input, 12-bit conversion, and 13-bit MSB
first data output format (if the sign bit was not turned off by a
previous instruction). This would require 13 SCLK periods
since the output data format is 13 bits. The part powers up
with No Auto Cal, No Auto Zero, 10 CCLK Acquisition Time,
12-bit conversion, data out with sign, 12- or 13-bit MSB First,
power up, and user mode. Auto Cal, Auto Zero, Power UP
and Power Down instructions do not change these default
settings. The following power up sequence should be fol-
lowed:
1.
Run the program
2.
Prior to responding to the prompt apply the power to the
ADC12L038
3.
Respond to the program prompts
It is recommended that the first instruction issued to the
ADC12L038 be Auto Cal (see Section 1.1).
DS011830-45
V
A+
, V
D+
, and V
REF+
on the ADC12L038 each have 0.01 μF and 0.1 μF chip caps, and 10 μF tantalum caps. All logic devices are bypassed with 0.1 μF
Note:
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相關代理商/技術參數(shù)
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