參數(shù)資料
型號(hào)： ADC12L034CIWM
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： ADC
英文描述： 3.3V Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
中文描述： 4-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24
封裝： SOP-24
文件頁(yè)數(shù)： 23/36頁(yè)
文件大?。?/td> 828K
代理商： ADC12L034CIWM
Tables
(Continued)
TABLE 4. ADC12L032 and ADC12L030 Multiplexer Addressing
Analog Channel Addressed
and Assignment
with A/DIN1 tied to MUXOUT1
and A/DIN2 tied to MUXOUT2
CH0
CH1
+
+
A/D Input
Polarity
Assignment
Multiplexer
Output
Channel
Assignment
MUXOUT1
CH0
CH0
CH0
CH1
Mode
MUX
Address
DI0
L
L
H
H
DI1
L
H
L
H
COM
A/DIN1
+
+
+
A/DIN2
+
MUXOUT2
CH1
CH1
COM
COM
+
Differential
Single-Ended
+
Note 21:
ADC12L030 does not have A/DIN1, A/DIN2, MUXOUT1 and MUXOUT2 pins.
TABLE 5. Mode Programming
ADC12L038
ADC12L034
ADC12L030
and
ADC12L032
DI0
DI0
DI1
DI1
DI2
DI2
DI3
DI4
DI3
DI5
DI4
DI6
DI5
DI7
DI6
Mode Selected
(Current)
DO Format
(next Conversion
Cycle)
DI0
DI1
DI2
DI3
DI4
DI5
See Tables 2, 3, 4
See Tables 2, 3, 4
See Tables 2, 3, 4
L
L
See Tables 2, 3, 4
See Tables 2, 3, 4
See Tables 2, 3, 4
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
L
12 Bit Conversion
12 Bit Conversion
8 Bit Conversion
12 Bit Conversion of Full-Scale
12 Bit Conversion
12 Bit Conversion
8 Bit Conversion
12 Bit Conversion of Offset
Auto Cal
Auto Zero
Power Up
Power Down
Read Status Register
Data Out without Sign
Data Out with Sign
Acquisition Time— 6 CCLK
Cycles
Acquisition Time— 10 CCLK
Cycles
Acquisition Time— 18 CCLK
Cycles
Acquisition Time— 34 CCLK
Cycles
User Mode
Test Mode
(CH1–CH7 become Active
Outputs)
12 or 13 Bit MSB First
16 or 17 Bit MSB First
8 or 9 Bit MSB First
12 or 13 Bit MSB First
12 or 13 Bit LSB First
16 or 17 Bit LSB First
8 or 9 Bit LSB First
12 or 13 Bit LSB First
No Change
No Change
No Change
No Change
No Change
No Change
No Change
No Change
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
H
H
H
L
No Change
H
L
L
L
H
H
H
L
No Change
H
H
L
L
H
H
H
L
No Change
L
H
L
X
L
X
L
X
H
H
H
H
H
H
H
H
No Change
No Change
X = Don’t Care
Note 22:
The A/D powers up with no Auto Cal, no Auto Zero, 10 CCLK acquisition time, 12-bit + sign conversion, power up, 12- or 13-bit MSB first and user mode.
www.national.com
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