
AC Electrical Characteristics
(Continued)
The following specifications apply for (V
+
= V
+ = V
+ = +5V, V
+ = +4.096V, and fully-differential input with fixed 2.048V
common-mode voltage) or (V
+
= V
+ = V
+ = +3.3V, V
+ = +2.5V and fully-differential input with fixed 1.250V
common-mode voltage), V
= 0V, 12-bit + sign conversion mode, source impedance for analog inputs, V
and V
REF
+
≤
25
, f
CK
= f
SK
= 5 MHz, and 10 (t
CK
) acquisition time unless otherwise specified.
Boldface limits apply for T
A
= T
J
=
T
MIN
to T
MAX
;
A
= T
J
= 25C. (Note 17) (Continued)
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
50
Units
(Limits)
ns (min)
t
SET-UP
Set-Up Time of CS Falling Edge to
Serial Data Clock Rising Edge
Delay from SCLK Falling
Edge to CS Falling Edge
Delay from CS Rising Edge to
DO TRI-STATE
DI Hold Time from Serial Data
Clock Rising Edge
DI Set-Up Time from Serial Data
Clock Rising Edge
DO Hold Time from Serial Data
Clock Falling Edge
Delay from Serial Data Clock
Falling Edge to DO Data Valid
DO Rise Time, TRI-STATE to High
DO Rise Time, Low to High
DO Fall Time, TRI-STATE to Low
DO Fall Time, High to Low
Delay from CS Falling Edge
to DOR Falling Edge
Delay from Serial Data Clock Falling
Edge to DOR Rising Edge
Capacitance of Logic Inputs
Capacitance of Logic Outputs
t
DELAY
0
5
ns (min)
t
1H
, t
0H
R
L
= 3k, C
L
= 100 pF
70
100
ns (max)
t
HDI
5
15
ns (min)
t
SDI
5
10
ns (min)
t
HDO
R
L
= 3k, C
L
= 100 pF
35
65
5
90
ns (max)
ns (min)
ns (max)
t
DDO
50
t
RDO
R
L
= 3k, C
L
= 100 pF
10
10
15
15
45
40
40
40
40
80
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
t
FDO
R
L
= 3k, C
L
= 100 pF
t
CD
t
SD
45
80
ns (max)
C
IN
C
OUT
10
20
pF
pF
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed speci-
fications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2:
All voltages are measured with respect to GND, unless otherwise specified.
Note 3:
When the input voltage (V
IN
) at any pin exceeds the power supplies (V
IN
<
GND or V
IN
>
V
A
+ or V
D
+), the current at that pin should be limited to 30 mA.
The 120 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four.
Note 4:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
J
max,
θ
JA
and the ambient temperature, T
A
. The maximum
allowable power dissipation at any temperature is P
D
= (T
J
max T
A
)/
θ
JA
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
T
J
max = 150C. The typical thermal resistance (
θ
JA
) of these parts when board mounted follow:
Thermal
Resistance
θ
JA
53C/W
70C/W
134C/W
40C/W
50C/W
125C/W
Part Number
ADC12130CIN
ADC12130CIWM
ADC12132CIMSA
ADC12138CIN
ADC12138CIWM
ADC12138CIMSA
Note 5:
The human body model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin.
Note 6:
See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National Semi-
conductor Linear Data Book for other methods of soldering surface mount devices.
A
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