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參數(shù)資料
| 型號： | ADC10154 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low-Voltage High-Speed Quadruple Differential Line Receiver 16-SOIC 0 to 70 |
| 中文描述： | 10位帶符號4レs的4模數(shù)轉(zhuǎn)換器-或8通道多路復(fù)用器，采樣/保持和參考 |
| 文件頁數(shù)： | 6/23頁 |
| 文件大小： | 439K |
| 代理商： | ADC10154 |
Electrical Characteristics
The following specifications apply for V
+
= AV
+
= DV
+
= + 5.0 V
, V
REF+
= 5.000 V
, V
REF
= GND, V
= GND for unipolar
operation or V
= 5.0 V
for bipolar operation, and f
= 5.0 MHz unless otherwise specified.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= 25C. (Note 16)
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
(Limit)
AC CHARACTERISTICS
f
CLK
Clock Frequency
8
10
5.0
MHz (Max)
kHz (Min)
% (Min)
% (Max)
1/f
CLK
μs (Max)
1/f
CLK
μs (Max)
1/f
CLK
μs (Max)
1/f
CLK
μs (Max)
1/f
CLK
μs
ns (Min)
Clock Duty Cycle
20
80
16
3.2
18
3.6
20
4.0
22
4.4
6
1.2
5
t
C
Conversion
Time
8-Bit Unipolar Mode
f
CLK
= 5.0 MHz
8-Bit Bipolar Mode
f
CLK
= 5.0 MHz
10-Bit Unipolar Mode
f
CLK
= 5.0 MHz
10-Bit Bipolar Mode
f
CLK
= 5.0 MHz
t
A
Acquisition Time
f
CLK
= 5.0 MHz
t
CR
Delay between Falling Edge of
CS and Falling Edge of RD
Delay betwee Rising Edge
RD and Rising Edge of CS
Delay between Falling Edge
of CS and Falling Edge of WR
Delay between Rising Edge
of WR and Rising Edge of CS
Delay between Falling Edge
of RD and Falling Edge of WR
WR Pulse Width
WR High to CLK
÷
2 Low Set-Up Time
Data Set-Up Time
Data Hold Time
Delay from Rising Edge
of WR to Rising Edge RD
Access Time (Delay from Falling
Edge of RD to Output Data Valid)
Delay from Falling Edge
of WR or RD to Reset of INT
Delay from Falling Edge of CLK
÷
2 to
Falling Edge of INT
TRI-STATE Control (Delay from
Rising Edge of RD to Hi-Z State)
Delay between Successive
RD Pulses
Delay between Last Rising Edge
of RD and the Next Falling
Edge of WR
Capacitance of Logic Inputs
Capacitance of Logic Outputs
0
t
RC
0
5
ns (Min)
t
CW
0
5
ns (Min)
t
WC
0
5
ns (Min)
t
RW
0
5
ns (Min)
t
W(WR)
t
WS
t
DS
t
DH
t
WR
25
50
5
15
5
5
ns (Min)
ns (Max)
ns (Max)
ns (Max)
ns (Min)
6
0
0
t
ACC
C
L
= 100 pF
25
45
ns (Max)
t
WI
, t
RI
C
L
= 100 pF
25
40
ns (Max)
t
INTL
40
ns
t
1H
, t
0H
C
L
= 10 pF, R
L
= 1 k
20
35
ns (Max)
t
RR
25
50
ns (Min)
t
P
20
50
ns (Min)
C
IN
C
OUT
5
5
pF
pF
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
A
www.national.com
6
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC10154BIJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC10154BIN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC10154CIJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC10154CIWM | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC10154CIWM/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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