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參數(shù)資料
| 型號： | ADC0851 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit Analog Data Acquisition and Monitoring Systems |
| 中文描述： | 8位模擬數(shù)據(jù)采集和監(jiān)控系統(tǒng) |
| 文件頁數(shù)： | 20/36頁 |
| 文件大?。?/td> | 581K |
| 代理商： | ADC0851 |
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2.0 Memory Access Modes
(Continued)
The address bits access specific memory locations as per
Table II(a) and (b) for the ADC0851 and ADC0858 respec-
tively. The address data is clocked in with the MSB (bit A3)
first.
The timing diagram in Figure 5 shows that after CS goes
low, the first four bits of the input word configure the device
to ‘‘read one limit’’ mode. Next, the address bits select the
desired memory location. Third clock rising edge after the
address data’s LSB is loaded, the limit data is output with
the LSB (bit L0) first.
2.4 READ ALL LIMITS MODE
With a mode address of 1 1 1 1, the device is configured in
the ‘‘read all limits mode’’. When in this mode, 8-bit limit
data from each memory location is serially transmitted out.
The data format for the input word is as follows:
Data Input (DI) WordDADC0851 or ADC0858
TL/H/11021–36
Note that no memory address data is required. The limit
data is sequentially transmitted out starting from the memo-
ry location for CH0–Lower Limit and ending at; CH1–Upper
Limit for the ADC0851 (see Table II(a)), CH7–Upper Limit
for the ADC0858 (see Table II(b)).
The timing diagram of Figure 6 shows that the input data is
loaded starting at the first rising edge of CLK after CS goes
low. Third clock rising edge after the last bit of the input data
is loaded, the limit data is serially transmitted out. Four limit
words are transmitted for the ADC0851; sixteen for the
ADC0858. Each limit word is output with the LSB (bit L0)
first. Taking CS high after the MSB of the last limit data is
transmitted completes the operation.
TL/H/11021–38
FIGURE 5. Timing Diagram for Read One Limit ADC0851/ADC0858
TL/H/11021–39
FIGURE 6. Timing Diagram for Read All Limits ADC0851/ADC0858
20
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC0851BIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851BIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIV | 8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0858CIN | 8-Bit Analog Data Acquisition and Monitoring Systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC0851 WAF | 制造商:Texas Instruments 功能描述: |
| ADC0851BIJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| ADC0851BIN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851BIV | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Analog Data Acquisition and Monitoring Systems |
| ADC0851CIJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
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