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參數(shù)資料
| 型號： | ADC0820 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit High Speed μP Compatible A/D Converter with Track/Hold Function(8位高速μP兼容A/D轉(zhuǎn)換器帶跟蹤/保持功能) |
| 中文描述： | CMOS、高速、8位A/D轉(zhuǎn)換器，帶有采樣/保持功能 |
| 文件頁數(shù)： | 10/22頁 |
| 文件大?。?/td> | 472K |
| 代理商： | ADC0820 |
1.0 Functional Description
(Continued)
ladder for the A/D as well as for generating the DAC signal.
The DAC output is actually the tap on the resistor ladder
which most closely approximates the analog input. In addi-
tion, the “sampled-data” comparators used in the ADC0820
provide the ability to compare the magnitudes of several
analog signals simultaneously, without using input summing
amplifiers. This is especially useful in the LS flash ADC,
where the signal to be converted is an analog difference.
1.2 THE SAMPLED-DATA COMPARATOR
Each comparator in the ADC0820 consists of a CMOS in-
verter with a capacitively coupled input (Figures 6, 7 ). Ana-
log switches connect the two comparator inputs to the input
capacitor (C) and also connect the inverter’s input and out-
put. This device in effect now has one differential input pair.
A comparison requires two cycles, one for zeroing the com-
parator, and another for making the comparison.
In the first cycle, one input switch and the inverter’s feedback
switch (Figure 6 ) are closed. In this interval, C is charged to
the connected input (V1) less the inverter’s bias voltage (V
B
,
approximately 1.2V). In the second cycle (Figure 7 ), these
two switches are opened and the other (V2) input’s switch is
closed. The input capacitor now subtracts its stored voltage
from the second input and the difference is amplified by the
inverter’s open loop gain. The inverter’s input (V
B
') becomes
and the output will go high or low depending on the sign of
V
B
'V
B
.
The actual circuitry used in the ADC0820 is a simple but im-
portant expansion of the basic comparator described above.
By adding a second capacitor and another set of switches to
the input (Figure 8 ), the scheme can be expanded to make
dual differential comparisons. In this circuit, the feedback
switch and one input switch on each capacitor (Z switches)
are closed in the zeroing cycle. A comparison is then made
by connecting the second input on each capacitor and open-
ing all of the other switches (S switches). The change in volt-
age at the inverter’s input, as a result of the change in charge
on each input capacitor, will now depend on both input signal
differences.
1.3 ARCHITECTURE
In theADC0820, one bank of 15 comparators is used in each
4-bit flash A/D converter (Figure 12 ). The MS (most signifi-
cant) flashADC also has one additional comparator to detect
input overrange. These two sets of comparators operate al-
ternately, with one group in its zeroing cycle while the other
is comparing.
When a typical conversion is started, the WR line is brought
low. At this instant the MS comparators go from zeroing to
comparison mode (Figure 11 ). When WR is returned high
after at least 600 ns, the output from the first set of compara-
tors (the first flash) is decoded and latched. At this point the
two 4-bit converters change modes and the LS (least signifi-
cant) flash ADC enters its compare cycle. No less than 600
ns later, the RD line may be pulled low to latch the lower 4
data bits and finish the 8-bit conversion. When RD goes low,
the flashA/Ds change state once again in preparation for the
next conversion.
Figure 11 also outlines how the converter’s interface timing
relates to its analog input (V
IN
). In WR-RD mode, V
IN
is mea-
DS005501-12
V
= V
V on C = V1V
C
S
= stray input node capacitor
V
B
= inverter input bias voltage
Zeroing Phase
FIGURE 6. Sampled-Data Comparator
DS005501-13
Compare Phase
FIGURE 7. Sampled-Data Comparator
DS005501-14
DS005501-45
FIGURE 8. ADC0820 Comparator (from MS Flash ADC)
www.national.com
10
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC0820 WAF | 制造商:Texas Instruments 功能描述: |
| ADC08200 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit, 20 Msps to 200 Msps, Low Power A/D Converter with Internal Sample-and-Hold |
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| ADC08200CIMT | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC08200CIMT/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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