參數(shù)資料
型號： ADC081500CIYB
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： ADC
英文描述： High Performance, Low Power, 8-Bit, 1.5 GSPS A/D Converter
中文描述： 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP128
封裝： MS-026BFB, LQFP-128
文件頁數(shù)： 9/28頁
文件大?。?/td> 830K
代理商： ADC081500CIYB
Converter Electrical Characteristics
(Continued)
The following specifications apply after calibration for V
= V
= +1.9V
, OutV = 1.9V, V
(a.c. coupled) Full Scale Range =
differential 870mV
, C
= 10 pF, Differential (a.c. coupled) sinewave input clock, f
CLK
= 1.5 GHz at 0.5V
with 50% duty
cycle, V
= Floating, Normal Control Mode, Single Data Rate Mode, R
= 3300
0.1%, Analog Signal Source Impedance
= 100
Differential.
Boldface limits apply for T
A
= T
MIN
to T
MAX
. All other limits T
A
= 25C, unless otherwise noted. (Notes 6,
7)
Symbol
Parameter
Conditions
Typical
(Note 8)
Limits
(Note 8)
Units
(Limits)
CLOCK INPUT CHARACTERISTICS
V
ID
Differential Clock Input Level
Sine Wave Clock
0.6
0.4
2.0
0.4
2.0
V
P-P
(min)
V
P-P
(max)
V
P-P
(min)
V
P-P
(max)
μA
pF
pF
Square Wave Clock
0.6
I
I
Input Current
Input Capacitance
(Notes 10, 11)
V
IN
= 0 or V
IN
= V
A
Differential
Each input to ground
±
1
0.02
1.5
C
IN
DIGITAL CONTROL PIN CHARACTERISTICS
V
IH
Logic High Input Voltage
V
IL
Logic Low Input Voltage
Input Capacitance
(Notes 11, 13)
DIGITAL OUTPUT CHARACTERISTICS
(Note 12)
(Note 12)
0.85 x V
A
0.15 x V
A
V (min)
V (max)
C
IN
Each input to ground
1.2
pF
V
OD
LVDS Differential Output
Voltage
Measured differentially, OutV = V
A
,
V
BG
= Floating (Note 15)
Measured differentially, OutV =
GND, V
BG
= Floating (Note 15)
710
400
920
280
720
mV
P-P
(min)
mV
P-P
(max)
mV
P-P
(min)
mV
P-P
(max)
510
V
O DIFF
Change in LVDS Output Swing
Between Logic Levels
Output Offset Voltage
Output Offset Voltage
Output Offset Voltage Change
Between Logic Levels
±
1
mV
V
OS
V
OS
V
BG
= Floating
V
BG
= V
A
(Note 15)
800
1200
mV
mV
V
OS
±
1
mV
I
OS
Output Short Circuit Current
Output+ & Output- connected to
0.8V
±
4
mA
Z
O
V
OH
V
OL
POWER SUPPLY CHARACTERISTICS
Differential Output Impedance
CalRun H level output
CalRun L level output
100
1.65
0.15
Ohms
V
V
I
OH
= -400uA (Note 12)
I
OH
= 400uA (Note 12)
1.5
0.3
I
A
Analog Supply Current
PD = Low
PD = High
PD = Low
PD = High
PD = Low
PD = High
Change in Full Scale Error with
change in V
A
from 1.8V to 2.0V
524
1.8
116
0.012
1.2
3.5
600
mA (max)
mA
mA (max)
mA
W (max)
mW
I
DR
Output Driver Supply Current
165
P
D
Power Consumption
1.45
PSRR1
D.C. Power Supply Rejection
Ratio
A.C. Power Supply Rejection
Ratio
AC ELECTRICAL CHARACTERISTICS
Maximum Input Clock
Frequency
Minimum Input Clock
Frequency
30
dB
PSRR2
248 MHz, 50mV
P-P
riding on V
A
51
dB
f
CLK1
1.7
1.5
GHz (min)
f
CLK2
200
MHz
A
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