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參數(shù)資料
| 型號： | ADC0805LCN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 8-Bit uP Compatible A/D Converters |
| 中文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 24/41頁 |
| 文件大?。?/td> | 1118K |
| 代理商： | ADC0805LCN |
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Functional Description
(Continued)
For a higher speed test system, or to obtain plotted data, a
digital-to-analog converter is needed for the test set-up. An
accurate 10-bit DAC can serve as the precision voltage
source for the A/D. Errors of the A/D under test can be ex-
pressed as either analog voltages or differences in 2 digital
words.
A basic A/D tester that uses a DAC and provides the error as
an analog output voltage is shown in Figure 8 The 2 op
amps can be eliminated if a lab DVM with a numerical sub-
traction feature is available to read the difference voltage,
“A–C”, directly. The analog input voltage can be supplied by
a low frequency ramp generator and an X-Y plotter can be
used to provide analog error (Y axis) versus analog input (X
axis).
For operation with a microprocessor or a computer-based
test system, it is more convenient to present the errors digi-
tally. This can be done with the circuit of Figure 11 where the
output code transitions can be detected as the 10-bit DAC is
incremented. This provides
1
4
LSB steps for the 8-bitA/D un-
der test. If the results of this test are automatically plotted
with the analog input on the X axis and the error (in LSB’s)
as the Y axis, a useful transfer function of the A/D under test
results. For acceptance testing, the plot is not necessary and
the testing speed can be increased by establishing internal
limits on the allowed error for each code.
4.0 MICROPROCESSOR INTERFACING
To dicuss the interface with 8080A and 6800 microproces-
sors, a common sample subroutine structure is used. The
microprocessor starts the A/D, reads and stores the results
of 16 successive conversions, then returns to the user’s pro-
gram. The 16 data bytes are stored in 16 successive
memory locations. All Data and Addresses will be given in
hexadecimal form. Software and hardware details are pro-
vided separately for each type of microprocessor.
4.1 Interfacing 8080 Microprocessor Derivatives (8048,
8085)
This converter has been designed to directly interface with
derivatives of the 8080 microprocessor. The A/D can be
mapped into memory space (using standard memory ad-
dress decoding for CS and the MEMR and MEMW strobes)
or it can be controlled as an I/O device by using the I/O R
and I/O W strobes and decoding the address bits A0
→
A7
(or address bitsA8
→
A15 as they will contain the same 8-bit
address information) to obtain the CS input. Using the I/O
space provides 256 additional addresses and may allow a
simpler 8-bit address decoder but the data can only be input
to the accumulator. To make use of the additional memory
reference instructions, the A/D should be mapped into
memory space. An example of an A/D in I/O space is shown
in Figure 12
DS005671-18
FIGURE 9. Basic A/D Tester
A
www.national.com
24
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC0805LCN/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 8-Bit |
| ADC0805LCN/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 8-Bit |
| ADC0805LCN/NOPB | 功能描述:IC ADC 8BIT MPU COMPAT 20-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| ADC0806 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter |
| ADC08060 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter |
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