- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378277 > ADC0804 (Intersil, Corp.) 8-Bit, Microprocessor-Compatible A/D Converters PDF資料下載
參數(shù)資料
| 型號(hào)： | ADC0804 |
| 廠商： | Intersil, Corp. |
| 元件分類： | 串行ADC |
| 英文描述： | 8-Bit, Microprocessor-Compatible A/D Converters |
| 中文描述： | 8位微處理器兼容的A/D轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大?。?/td> | 250K |
| 代理商： | ADC0804 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)當(dāng)前第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)
6-9
Logic “1” Output Voltage, V
OH
Three-State Disabled Output
Leakage (All Data Buffers)
, I
LO
l
O
= -360
μ
A, V+ = 4.75V
V
OUT
= 0V
V
OUT
= 5V
V
OUT
Short to Gnd T
A
= 25
o
C
2.4
-
-
V
-3
-
-
μ
A
μ
A
-
-
3
Output Short Circuit Current,
I
SOURCE
Output Short Circuit Current,
I
SINK
NOTES:
1. All voltages are measured with respect to GND, unless otherwise specified. The separate AGND point should always be wired to the
DGND, being careful to avoid ground loops.
2. For V
IN(-)
≥
V
IN(+)
the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which
will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the V+ supply. Be careful,
during testing at low V+ levels (4.5V), as high level analog inputs (5V) can cause this input diode to conduct - especially at elevated tem-
peratures, and cause errors for analog inputs near full scale. As long as the analog V
IN
does not exceed the supply voltage by more than
50mV, the output code will be correct. To achieve an absolute 0V to 5V input voltage range will therefore require a minimum supply volt-
age of 4.950V over temperature variations, initial tolerance and loading.
3. With V+ = 6V, the digital logic interfaces are no longer TTL compatible.
4. With an asynchronous start pulse, up to 8 clock periods may be required before the internal clock phases are proper to start the conversion
process.
5. The CS input is assumed to bracket the WR strobe input so that timing is dependent on the WR pulse width. An arbitrarily wide pulse
width will hold the converter in a reset mode and the start of conversion is initiated by the low to high transition of the WR pulse (see
Timing Diagrams).
6. CLK IN (pin 4) is the input of a Schmitt trigger circuit and is therefore specified separately.
7. None of these A/Ds requires a zero-adjust. However, if an all zero code is desired for an analog input other than 0V, or if a narrow full scale span
exists (for example: 0.5V to 4V full scale) the V
IN(-)
input can be adjusted to achieve this. See the Zero Error description in this data sheet.
4.5
6
-
mA
V
OUT
Short to V+ T
A
= 25
o
C
9.0
16
-
mA
Electrical Specifications
(Notes 1, 7)
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Timing Waveforms
FIGURE 1A. t
1H
FIGURE 1B. t
1H
, C
L
= 10pF
FIGURE 1C. t
0H
FIGURE 1D. t
0H
, C
L
= 10pF
FIGURE 1. THREE-STATE CIRCUITS AND WAVEFORMS
10K
V+
RD
CS
C
L
DATA
OUTPUT
RD
2.4V
t
r
90%
50%
10%
t
1H
0.8V
DATA
OUTPUTS
GND
t
r
= 20ns
V
OH
90%
10K
V+
RD
CS
C
L
DATA
OUTPUT
V+
RD
2.4V
t
r
90%
50%
10%
t
0H
0.8V
DATA
OUTPUTS
V
OI
t
r
= 20ns
V+
10%
ADC0802, ADC0803, ADC0804
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC08060 | 8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter |
| ADC08060CIMT | 8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter |
| ADC0806 | 8-Bit, 20 MSPS to 60 MSPS, 1.3 mW/MSPS A/D Converter |
| ADC08062 | 500 ns A/D Converter with S/H Function and Input Multiplexer |
| ADC08061 | 500 ns A/D Converter with S/H Function and Input Multiplexer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC0804/D DIE | 制造商:Harris Corporation 功能描述: |
| ADC0804-1CD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS 8-bit A/D converters |
| ADC0804-1CN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS 8-bit A/D converters |
| ADC0804-1LCD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS 8-bit A/D converters |
| ADC0804-1LCN | 制造商:NXP Semiconductors 功能描述:Analog Digital Converter, Single, 8 Bit, 20 Pin, DIP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。