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參數(shù)資料
| 型號： | ADAV801ASTZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/60頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC AUDIO R-DVD 3.3V 64LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 類型： | 音頻編解碼器 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 2 / 2 |
| 三角積分調(diào)變： | 無 |
| 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 102 / 101 |
| 電壓 - 電源，模擬： | 3 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADAV801EBZ-ND - BOARD EVALUATION FOR ADAV801 |
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ADAV801
Rev. A | Page 17 of 60
Selecting a Sample Rate
The output sample rate of the ADC is always ADC MCLK/256,
as shown in Figure 23. By default, the ADC modulator runs at
ADC MCLK/2. When the ADC MCLK exceeds 12.288 MHz,
the ADC modulator should be set to run at ADC MCLK/4. This
is achieved by setting the AMC (ADC Modulator Clock) bit in
the ADC Control Register 1. To compensate for the reduced
modulator clock speed, a different set of filters are used in the
decimator section, ensuring that the sample rate remains
the same.
The AMC bit can also be used to boost the THD + N perform-
ance of the ADC at the expense of dynamic range. The
improvement is typically 0.5 dB to 1.0 dB and works because
selecting the lower modulator rate reduces the amount of digital
noise, improving THD + N, but also reduces the oversampling
ratio, therefore reducing the dynamic range by a corresponding
amount.
For best performance of the ADC, avoid using similar frequency
clocks from separate sources in the ADAV801. For example,
running the ADC from a 12.288 MHz clock connected to
MCLKI and using the PLL to generate a separate 12.288 MHz
clock for the DAC can reduce the performance of the ADC.
This is due to the interaction of the clocks, which generate beat
frequencies that can affect the charge on the switch capacitors of
the analog inputs.
WAIT FOR SAMPLE
DECREASE GAIN BY 0.5dB
AND WAIT ATTACK TIME
IS A RECOVERY
MODE ENABLED?
IS SAMPLE
GREATER THAN ATTACK
THRESHOLD?
IS SAMPLE
ABOVE ATTACK
THRESHOLD?
ARE ALL
SAMPLES BELOW
RECOVERY
THRESHOLD?
HAS GAIN BEEN
FULLY RESTORED?
YES
NO
YES
NO
NORMAL RECOVERY
INCREASE GAIN BY 0.5dB
WAIT RECOVERY TIME
LIMITED RECOVERY
ATTACK MODE
04
57
7-
0
06
IS SAMPLE
ABOVE ATTACK
THRESHOLD?
ARE ALL
SAMPLES BELOW
RECOVERY
THRESHOLD?
HAS GAIN BEEN
FULLY RESTORED?
IS GAINCNTR
AT MAXIMUM?
YES
NO
YES
NO
INCREASE GAIN BY 0.5dB
NO
INCREMENT
GAINCNTR
NO
HAS RECOVERY
TIME BEEN
REACHED?
HAS RECOVERY
TIME BEEN
REACHED?
Figure 26. ALC Flow Diagram
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| ADG1201BRJZ-R2 | IC SWITCH SPST NO SOT23 |
| ADG1204YRUZ-REEL7 | IC MULTIPLEXER 4X1 14TSSOP |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADAV802AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
| ADAV802ASTZ | 制造商:Analog Devices 功能描述: |
| ADAV803 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Audio Codec for Recordable DVD |
| ADAV803AST | 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk |
| ADAV803ASTZ | 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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