參數(shù)資料
型號(hào): ADAV801
廠商: Analog Devices, Inc.
元件分類(lèi): Codec
英文描述: Audio Codec for Recordable DVD
中文描述: 音頻編解碼器可刻錄DVD
文件頁(yè)數(shù): 40/56頁(yè)
文件大?。?/td> 1405K
代理商: ADAV801
ADAV801
Table 42. Sample Rate Converter Error Ma
Rev. 0 | Page 40 of 56
sk Register
RES
5
ADDRESS = 0011011 (0x1B)
OVRL Mask
OVRR Mask
MUTE_IND M
RES
6
RES
4
RES
3
OVRL Mask
2
sk
E_
RES
7
OVRR Ma
1
MUT
0
IND MASK
Masks the OVRL from generating an interrupt.
0 = OVRL bit does not generate an interrupt.
1 = OVRL bit generates an interrupt.
Masks the OVRR from generating an interrupt.
0 = OVRR bit does not generate an interrupt.
1 = OVRR bit generates an interrupt. Reserved.
Masks the MUTE_IND from generating an
0 = MUTE_IND bit does not generate an interrupt.
1 = MUTE_IND bit generates an interrupt.
ASK
interrupt.
Table 43. Interrupt St
ADDRESS = 0011100 (0x1C)
SRCError
TxCSINT
4
RxCSDIFF
3
RxUBINT
2
RxCSBINT
1
RxERROR
0
atus Register
SRCError
7
TxCSTINT
6
TxUBINT
5
This bit is set, if one of the sample rate converter interrupts is asserted, and the host should immediately read the
gh until the interrupt status register is read.
sample rate converter error register. This bit remains hi
This bit is set, if a write to the transmitter channel status buffer was made while transmitter channel status bits were
fer to the SPDIF transmit buffer.
his bit remains high until the interrupt status register is read.
it buffer has transmitted its block of channel status. This bit remains
This bit is set, if the transmitter channel status b
high until the interrupt status register is read.
This bit is set, if the receiver Channel Status A block is different from the re
TxCSTINT
ceiver Channel Status B clock. This bit
remains high until read, but does not generate an interrupt.
eiver user bit buffer has a new block or message. This bit remains high until the interrupt
This bit is set, if the rec
status register is read.
This b
a new
hannel sta
d when RxBC NF3 =
Rx
Th
hi
This bit
receiver error register. This bit rema
RxCSBIN
it is set, if
BCONF3 = 1.
is set, if one of the AES3/SPDIF receiver interrupts is asserted, and the host should immediately read the
ins high until the interrupt status register is read.
block of c
is bit remains
tus is rea
O
0, or if the
when
gh until the interrupt status register is read.
being copied from the transmitter CS buf
This bit is set, if the SPDIF transmit buffer is empty. T
TxUBINT
TxCSINT
RxCSDIFF
RxUBINT
T
channel status ha changed
RxERROR
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ADAV801ASTZ Audio Codec for Recordable DVD
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ADAV801AST 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk
ADAV801ASTZ 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率(位):18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比,標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源,模擬:2.6 V ~ 3.3 V 電壓 - 電源,數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP(7x7) 包裝:帶卷 (TR)
ADAV801ASTZ-REEL 功能描述:IC CODEC AUDIO R-DVD 3.3V 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類(lèi)型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率(位):18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比,標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源,模擬:2.6 V ~ 3.3 V 電壓 - 電源,數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:48-TQFN-EP(7x7) 包裝:帶卷 (TR)
ADAV802AST 制造商:Analog Devices 功能描述:AUDIO CODEC FOR RECORDABLE DVD - Bulk
ADAV802ASTZ 制造商:Analog Devices 功能描述: