參數(shù)資料
型號(hào)： ADA4940-2ACPZ-RL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/33頁(yè)
文件大?。?/td> 0K
描述： IC DIFF ADC DVR 18BIT LN 24LFCSP
標(biāo)準(zhǔn)包裝： 5,000
放大器類型： 差分
電路數(shù)： 2
輸出類型： 差分
轉(zhuǎn)換速率： 95 V/µs
-3db帶寬： 260MHz
電流 - 輸入偏壓： 1.1µA
電壓 - 輸入偏移： 60µV
電流 - 電源： 1.25mA
電流 - 輸出 / 通道： 46mA
電壓 - 電源，單路/雙路(±)： 3 V ~ 7 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 24-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 24-LFCSP-VQ（4x4）
包裝： 帶卷 (TR)
ADA4940-1/ADA4940-2
Data Sheet
Rev. C | Page 28 of 32
LAYOUT, GROUNDING, AND BYPASSING
As a high speed device, the ADA4940-1/ADA4940-2 are
sensitive to the PCB environment in which they operate.
Realizing their superior performance requires attention to
the details of high speed PCB design.
The first requirement is a solid ground plane that covers as
much of the board area around the ADA4940-1 as possible.
However, clear the area near the feedback resistors (RF), gain
resistors (RG), and the input summing nodes (Pin 2 and Pin 3)
of all ground and power planes (see Figure 74). Clearing the
ground and power planes minimizes any stray capacitance at
these nodes and prevents peaking of the response of the
amplifier at high frequencies.
The thermal resistance, θJA, is specified for the device, including
the exposed pad, soldered to a high thermal conductivity 4-layer
circuit board, as described in EIA/JESD 51-7.
0
84
52
-08
6
Figure 74. Ground and Power Plane Voiding in Vicinity of RF and RG
Bypass the power supply pins as close to the device as possible
and directly to a nearby ground plane. Use high frequency ceramic
chip capacitors. Use two parallel bypass capacitors (1000 pF and
0.1 μF) for each supply. Place the 1000 pF capacitor closer to the
device. Further away, provide low frequency bypassing using
10 μF tantalum capacitors from each supply to ground.
Ensure that signal routing is short and direct to avoid parasitic
effects. Wherever complementary signals exist, provide a
symmetrical layout to maximize balanced performance. When
routing differential signals over a long distance, ensure that
PCB traces are close together, and twist any differential wiring
such that loop area is minimized. Doing this reduces radiated
energy and makes the circuit less susceptible to interference.
1.30
0.80
1.30
08
45
2-
08
7
Figure 75. Recommended PCB Thermal Attach Pad Dimensions (mm)
0.30
PLATED
VIA HOLE
1.30
GROUND PLANE
POWER PLANE
BOTTOM METAL
TOP METAL
0
845
2-
0
88
Figure 76. Cross-Section of 4-Layer PCB Showing Thermal Via Connection to Buried Ground Plane (Dimensions in mm)
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