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| 型號(hào)： | ADA4940-2ACPZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 18/33頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF ADC DVR 18BIT LN 24LFCSP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 95 V/µs |
| -3db帶寬： | 260MHz |
| 電流 - 輸入偏壓： | 1.1µA |
| 電壓 - 輸入偏移： | 60µV |
| 電流 - 電源： | 1.25mA |
| 電流 - 輸出 / 通道： | 46mA |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 7 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 帶卷 (TR) |
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ADA4940-1/ADA4940-2
Data Sheet
Rev. C | Page 24 of 32
Table 15 and Table 16 list several common gain settings, recommended resistor values, input impedances, and output noise density for both
balanced and unbalanced input configurations.
Nominal Gain (dB)
RF (Ω)
RG (Ω)
RIN, dm (Ω)
Differential Output Noise Density (nV/√Hz)
RTI (nV/√Hz)
0
1000
2000
11.3
6
1000
500
1000
15.4
7.7
10
1000
318
636
20.0
6.8
14
1000
196
392
27.7
5.5
Nominal Gain (dB)
RF (Ω)
RG (Ω)
RT (Ω)
RIN,se (Ω)
RG1 (Ω)1
Differential Output Noise Density (nV/√Hz)
RTI (nV/√Hz)
0
1000
52.3
1333
1025
11.2
6
1000
500
53.6
750
526
15.0
7.5
10
1000
318
54.9
512
344
19.0
6.3
14
1000
196
59.0
337
223
25.3
5
1 RG1 = RG + (RS||RT)
IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
Even if the external feedback networks (RF/RG) are mismatched,
the internal common-mode feedback loop still forces the outputs
to remain balanced. The amplitudes of the signals at each output
remain equal and 180° out of phase. The input-to-output,
differential mode gain varies proportionately to the feedback
mismatch, but the output balance is unaffected.
As well as causing a noise contribution from VOCM, ratio-matching
errors in the external resistors result in a degradation of the ability
of the circuit to reject input common-mode signals, much the
same as for a four resistors difference amplifier made from a
conventional op amp.
In addition, if the dc levels of the input and output common-
mode voltages are different, matching errors result in a small
differential mode, output offset voltage. When G = 1, with a
ground-referenced input signal and the output common-mode
level set to 2.5 V, an output offset of as much as 25 mV (1% of
the difference in common-mode levels) can result if 1% tolerance
resistors are used. Resistors of 1% tolerance result in a worst-
case input CMRR of about 40 dB, a worst-case differential mode
output offset of 25 mV due to the 2.5 V level-shift, and no
significant degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
(+DIN and DIN) is simply RIN, dm = 2 × RG.
For an unbalanced, single-ended input signal (see Figure 65), the
input impedance is
F
G
F
G
se
IN
R
2
1
,
+VS
ADA4940-1/
ADA4940-2
+IN
–IN
RF
+DIN
–DIN
VOCM
RG
VOUT, dm
08
45
2-
05
1
Figure 64. ADA4940-1/ADA4940-2 Configured for Balanced (Differential) Inputs
RT
RS
ADA4940-1/
ADA4940-2
+VS
RF
RG
RS
RG
RF
VOCM
RT
VOUT, dm
08
452
-052
+IN
–IN
Figure 65. ADA4940-1/ADA4940-2 Configured for Unbalanced (Single-Ended)
Input
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the input resistor RG1.
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