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| 型號： | ADA4891-2ARZ-RL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP GP R-R CMOS DUAL 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 2 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 210 V/µs |
| -3db帶寬： | 240MHz |
| 電流 - 輸入偏壓： | 2pA |
| 電壓 - 輸入偏移： | 2500µV |
| 電流 - 電源： | 4.4mA |
| 電流 - 輸出 / 通道： | 125mA |
| 電壓 - 電源，單路/雙路(±)： | 2.7 V ~ 5.5 V，±1.35 V ~ 2.75 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SO |
| 包裝： | 帶卷 (TR) |
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Data Sheet
Rev. E | Page 16 of 24
Table 6. Recommended Component Values and Effect of Gain on ADA4891-3/ADA4891-4 Performance (RL = 1 k)
Feedback Network Values
3 dB Small-Signal Bandwidth (MHz)
Slew Rate (V/s)
Peaking (dB)
Gain
RF ()
RG ()
VOUT = 200 mV p-p
tR
tF
1
453
97
186
194
0.9
+1
0
Open
220
151
262
4.1
+2
453
97
181
223
0.9
+5
453
90.6
31
112
120
0
+10
453
45.3
13
68
67
0
EFFECT OF RF ON 0.1 dB GAIN FLATNESS
Gain flatness is an important specification in video applications.
It represents the maximum allowable deviation in the signal
amplitude within the pass band. Tests have revealed that the
human eye is unable to distinguish brightness variations of
less than 1%, which translates into a 0.1 dB signal drop within
the pass band or, put simply, 0.1 dB gain flatness.
The PCB layout configuration and bond pads of the chip often
contribute to stray capacitance. The stray capacitance at the
inverting input forms a pole with the feedback and gain resistors.
This additional pole adds phase shift and reduces phase margin
in the closed-loop phase response, causing instability in the
amplifier and peaking in the frequency response.
Figure 52 and Figure 53 show the effect of using various values
for Feedback Resistor RF on the 0.1 dB gain flatness of the parts.
Figure 52 shows the effect for the ADA4891-1/ADA4891-2.
Figure 53 show the effect for the ADA4891-3/ADA4891-4.
Note that a larger RF value causes more peaking because the
additional pole formed by RF and the input stray capacitance
shifts down in frequency and interacts significantly with the
internal poles of the amplifier.
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
1
0.1
10
100
FREQUENCY (MHz)
N
OR
M
A
LIZE
D
C
LOS
E
D
-LOO
P
G
AI
N
(
d
B)
VS = 5V
G = +2
VOUT = 2V p-p
RL = 150Ω
RG = RF = 604
RG = RF = 549
RG = RF = 649
RG = RF = 698
08054-
022
Figure 52. 0.1 dB Gain Flatness, Noninverting Gain Configuration,
ADA4891-1/ADA4891-2
–0.4
–0.5
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
1
0.1
10
100
FREQUENCY (MHz)
N
OR
M
A
LIZE
D
C
LOS
E
D
-LOO
P
G
AI
N
(
d
B)
08054-
085
VS = 5V
G = +2
VOUT = 2V p-p
RL = 150Ω
RG = RF = 453
RG = RF = 402
RG = RF = 357
RG = RF = 301
Figure 53. 0.1 dB Gain Flatness, Noninverting Gain Configuration,
ADA4891-3/ADA4891-4
To obtain the desired 0.1 dB bandwidth, adjust the feedback
be adjusted, a small capacitor can be placed in parallel with RF
to reduce peaking.
The feedback capacitor, CF, forms a zero with the feedback
resistor, which cancels out the pole formed by the input stray
capacitance and the gain and feedback resistors. For a first pass
in determining the CF value, use the following equation:
RG × CS = RF × CF
where:
RG is the gain resistor.
CS is the input stray capacitance.
RF is the feedback resistor.
CF is the feedback capacitor.
Using this equation, the original closed-loop frequency response of
the amplifier is restored, as if there is no stray input capacitance.
Most often, however, the value of CF is determined empirically.
Figure 54 shows the effect of using various values for the
feedback capacitor to reduce peaking. In this case, the
ADA4891-1/ ADA4891-2 are used for demonstration purposes
and RF = RG = 604 Ω. The input stray capacitance, together with
the board parasitics, is approximately 2 pF.
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