參數(shù)資料
型號: ADA4891-2ARZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 21/24頁
文件大?。?/td> 0K
描述: IC OPAMP GP R-R CMOS DUAL 8SOIC
標(biāo)準(zhǔn)包裝: 2,500
放大器類型: 通用
電路數(shù): 2
輸出類型: 滿擺幅
轉(zhuǎn)換速率: 210 V/µs
-3db帶寬: 240MHz
電流 - 輸入偏壓: 2pA
電壓 - 輸入偏移: 2500µV
電流 - 電源: 4.4mA
電流 - 輸出 / 通道: 125mA
電壓 - 電源,單路/雙路(±): 2.7 V ~ 5.5 V,±1.35 V ~ 2.75 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SO
包裝: 帶卷 (TR)
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4
Data Sheet
Rev. E | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
Supply Voltage
6 V
Input Voltage (Common Mode)
VS 0.5 V to +VS
Differential Input Voltage
±VS
Storage Temperature Range
65°C to +125°C
Operating Temperature Range
40°C to +125°C
Lead Temperature (Soldering, 10 sec)
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum power that can be safely dissipated by the
ADA4891-1/ADA4891-2/ADA4891-3/ADA4891-4 is limited
by the associated rise in junction temperature. The maximum
safe junction temperature for plastic encapsulated devices is
determined by the glass transition temperature of the plastic,
approximately 150°C. Temporarily exceeding this limit can
cause a shift in parametric performance due to a change in the
stresses exerted on the die by the package. Exceeding a junction
temperature of 175°C for an extended period can result in
device failure.
The still-air thermal properties of the package (θJA), the ambient
temperature (TA), and the total power dissipated in the package
(PD) can be used to determine the junction temperature of the die.
The junction temperature can be calculated as
TJ = TA + (PD × θJA)
(1)
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. It can be calculated by
PD = (VT × IS) + (VS VOUT) × (VOUT/RL)
(2)
where:
VT is the total supply rail.
IS is the quiescent current.
VS is the positive supply rail.
VOUT is the output of the amplifier.
RL is the output load of the amplifier.
To ensure proper operation, it is necessary to observe the maxi-
mum power derating curves shown in Figure 6. These curves
are derived by setting TJ = 150°C in Equation 1. Figure 6 shows
the maximum safe power dissipation in the package vs. the
ambient temperature on a JEDEC standard 4-layer board.
0
0.5
1.0
2.0
1.5
–55
–35
–15
5
25
45
65
85
105
125
AMBIENT TEMPERATURE (°C)
MA
XI
MU
M
PO
W
ER
D
ISSI
PA
TION
(
W)
14-LEAD TSSOP
8-LEAD SOIC_N
14-LEAD SOIC_N
5-LEAD SOT-23
8-LEAD MSOP
TJ = 150°C
08054-
002
Figure 6. Maximum Power Dissipation vs. Ambient Temperature
Table 4 lists the thermal resistance (θJA) for each ADA4891-1/
ADA4891-2/ADA4891-3/ADA4891-4 package.
Table 4.
Package Type
θJA
Unit
5-Lead SOT-23
146
°C/W
8-Lead SOIC_N
115
°C/W
8-Lead MSOP
133
°C/W
14-Lead SOIC_N
162
°C/W
14-Lead TSSOP
108
°C/W
ESD CAUTION
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