參數(shù)資料
型號(hào)： AD9834BRUZ-REEL7
廠(chǎng)商： Analog Devices Inc
文件頁(yè)數(shù)： 16/32頁(yè)
文件大?。?/td> 0K
描述： IC DDS 10BIT 50MHZ LP 20TSSOP
產(chǎn)品培訓(xùn)模塊： Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
設(shè)計(jì)資源： Amplitude Control Circuit for AD9834 Waveform Generator (CN0156)
標(biāo)準(zhǔn)包裝： 1,000
分辨率（位）： 10 b
主 fclk： 50MHz
調(diào)節(jié)字寬（位）： 28 b
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 105°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
Data Sheet
AD9834
Rev. D | Page 23 of 32
APPLICATIONS INFORMATION
Because of the various output options available from the part,
the AD9834 can be configured to suit a wide variety of
applications.
One of the areas where the AD9834 is suitable is in modulation
applications. The part can be used to perform simple modulation
such as FSK. More complex modulation schemes such as GMSK
and QPSK can also be implemented using the AD9834.
In an FSK application, the two frequency registers of the
AD9834 are loaded with different values. One frequency
represents the space frequency, and the other represents the
mark frequency. The digital data stream is fed to the FSELECT
pin, causing the AD9834 to modulate the carrier frequency
between the two values.
The AD9834 has two phase registers, enabling the part to
perform PSK. With phase shift keying, the carrier frequency is
phase shifted, the phase being altered by an amount that is
related to the bit stream that is input to the modulator.
The AD9834 is also suitable for signal generator applications.
With the on-board comparator, the device can be used to
generate a square wave.
With its low current consumption, the part is suitable for
applications where it is used as a local oscillator.
CHANGE PHASE?
CHANGE FREQUENCY?
NO
YES
NO
YES
NO
YES
DAC OUTPUT
VOUT = VREFOUT × 18 × RLOAD/RSET × (1 + (SIN(2π(FREQREG × fMCLK × t/228 + PHASEREG/212))))
INITIALIZATION
SEE FIGURE 32
SELECT DATA
SOURCES
SEE FIGURE 34
WAIT 8/9 MCLK
CYCLES
SEE TIMING DIAGRAM
FIGURE 3
CHANGE PSEL/
PSELECT?
CHANGE PHASE
REGISTER?
CHANGE DAC OUTPUT
FROM SIN TO RAMP?
CHANGE OUTPUT AT
SIGN BIT OUT PIN?
CHANGE FSEL/
FSELECT?
CHANGE FREQUENCY
REGISTER?
CONTROL
REGISTER
WRITE
DATA WRITE
SEE FIGURE 33
0
270
5-
0
28
Figure 31. Flow Chart for Initialization and Operation
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