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參數(shù)資料
| 型號： | AD9833 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | +2.5 V to +5.5 V, 25 MHz Low Power CMOS Complete DDS |
| 中文描述： | 2.5 V至5.5 V，25 MHz低功耗CMOS完整的DDS |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 210K |
| 代理商： | AD9833 |
AD9833
–
8
–
REV PrG
PRELIMINARY TECHNICAL DATA
CIRCUIT DESCRIPTION
The AD9833 is a fully integrated Direct Digital Synthesis
(DDS) chip. The chip requires one reference clock, one
low precision resistor and decoupling capacitors to pro-
vide digitally created sine waves up to 12.5 MHz. In
addition to the generation of this RF signal, the chip is
fully capable of a broad range of simple and complex
modulation schemes. These modulation schemes are fully
implemented in the digital domain allowing accurate and
simple realization of complex modulation algorithms us-
ing DSP techniques.
The internal circuitry of the AD9833 consists of the fol-
lowing main sections: a Numerical Controlled Oscillator
(NCO), Frequency and Phase Modulators, SIN ROM, a
Digital-to-Analog Converter, and a Regulator.
Numerical Controlled Oscillator + Phase Modulator
This consists of two frequency select registers, a phase
accumulator, two phase offset registers and a phase offset
adder. The main component of the NCO is a 28-bit phase
accumulator which assembles the phase component of the
output signal. Continuous time signals have a phase range
of 0 to 2 . Outside this range of numbers, the sinusoid
functions repeat themselves in a periodic manner. The
digital implementation is no different. The accumulator
simply scales the range of phase numbers into a multibit
digital word. The phase accumulator in the AD9833 is
implemented with 28 bits. Therefore, in the AD9833, 2
= 2
28
. Likewise, the
Phase
term is scaled into this range
of numbers 0 <
Phase
< 2
28
– 1. Making these substitu-
tions into the equation above
f
=
Phase
x
f
MCLK
/2
28
where 0 <
Phase
< 2
28
- 1.
The input to the phase accumulator (i.e., the phase step)
can be selected either from the FREQ0 Register or
FREQ1 Register and this is controlled by the FSELECT
bit. NCOs inherently generate continuous phase signals,
thus avoiding any output discontinuity when switching
between frequencies.
Following the NCO, a phase offset can be added to
perform phase modulation using the 12-bit Phase
Registers. The contents of one of these phase registers is
added to the most significant bits of the NCO. The
AD9833 has two Phase registers, the resolution of these
registers being 2
π
/4096.
SIN ROM
To make the output from the NCO useful, it must be
converted from phase information into a sinusoidal value.
Since phase information maps directly into amplitude, the
SIN ROM uses the digital phase information as an ad-
dress to a look-up table, and converts the phase
information into amplitude. Although the NCO contains a
28-bit phase accumulator, the output of the NCO is trun-
cated to 12 bits. Using the full resolution of the phase
accumulator is impractical and unnecessary as this would
require a look-up table of 2
28
entries. It is necessary only
to have sufficient phase resolution such that the errors due
to truncation are smaller than the resolution of the 10-bit
DAC. This requires the SIN ROM to have two bits of
phase resolution more than the 10-bit DAC.
The SIN ROM is enabled using the MODE bit (D1) in
the control register. This is explained further in Table 11.
Digital-to-Analog Converter
The AD9833 includes a high impedance current source
10-bit DAC. The DAC receives the digital words from
the SIN ROM and converts them into the corresponding
analog voltages.
The DAC is configured for single-ended operation. An
external load resistor is not required as the device has a
200
resistor on board. The DAC generates an output
voltage of typically 0.6 Vpp.
Regulator
VDD provides the power supply required for the analog
section and the digital section of the AD9833. This supply
can have a value of +2.3V to +5.5V
The internal digital section of the AD9833 is operated at
2.5 V. An on-board regulator steps down the voltage ap-
plied at VDD to 2.5 V. When the applied voltage at the
VDD pin of the AD9833 is equal to or less than 2.7 V,
the pins CAP/2.5V and VDD should be tied together, thus
by-passing the on-board regulator.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9833BRM | +2.5 V to +5.5 V, 25 MHz Low Power CMOS Complete DDS |
| AD9834 | Low Power, +2.3 V to +5.5 V, 50 MHz Complete DDS |
| AD9834BRU | Low Power, +2.3 V to +5.5 V, 50 MHz Complete DDS |
| AD9835 | 50 MHz CMOS Complete DDS |
| AD9835BRU | 50 MHz CMOS Complete DDS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9833BRM | 功能描述:IC WAVEFORM GEN PROG 10-MSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9833BRM-REEL | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 25MHz 1-DAC 10-Bit Serial 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:PROGRAMMABLE WAVEFORM GENERATOR 10MSOP - Tape and Reel |
| AD9833BRM-REEL7 | 功能描述:IC WAVEFORM GEN PROG 10-MSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9833BRMZ | 功能描述:IC WAVEFORM GENERTR PROG 10-MSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9833BRMZ | 制造商:Analog Devices 功能描述:WAVEFORM GENERATOR 9833 MSOP10 |
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