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參數(shù)資料
| 型號： | AD9833 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | +2.5 V to +5.5 V, 25 MHz Low Power CMOS Complete DDS |
| 中文描述： | 2.5 V至5.5 V，25 MHz低功耗CMOS完整的DDS |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 210K |
| 代理商： | AD9833 |
AD9833
–
12
–
REV PrG
PRELIMINARY TECHNICAL DATA
appear at the DAC output 7 MCLK cycles after RESET is
set to 0.
Table 9: Applying RESET
RESET bit
Result
0
1
No Reset Applied
Internal Registers Reset
The Sleep Function
Sections of the AD9833 which are not in use can be pow-
ered down to minimise power consumption. This is done
using the Sleep Function. The parts of the chip that can
be powered down are the Internal clock and the DAC.
The bits required for the Sleep Function are outlined in
Table 10.
Table 10: Applying the SLEEP Function
SLEEP1
bit
SLEEP12
bit
Result
0
0
1
1
0
1
0
1
No powerdown
DAC Powered Down
Internal Clock disabled
Both the DAC powered down and
the Internal Clock disabled
DAC Powered Down:
This is useful when the AD9833 is
used to output the MSB of the DAC data only. In this
case, the DAC is not required so it can be powered down
to reduce power consumption.
Internal Clock disabled:
When the internal clock of the
AD9833 is disabled the DAC output will remain at its
present value as the NCO is no longer accumulating. New
frequency, phase and control words can be written to the
part when the SLEEP1 control bit is active. The
synchronising clock is still active which means that the
selected frequency and phase registers can also be changed
using the control bits. Setting the SLEEP1 bit equal to 0
enables the MCLK. Any changes made to the registers
while SLEEP1 was active will be seen at the output after a
certain latency.
The VOUT Pin
The AD9833 offers a variety of outputs from the chip, all
of which are available from the VOUT pin. The choice of
outputs are:
The MSB of the DAC data,
A sinusoidal output or
A ramp output.
The bits OPBITEN (D5) and MODE (D1) in the control
register are used to decide which output is available from
the AD9833. This is explained further below and also in
Table 11.
MSB of the DAC data:
The MSB of the DAC data can be
output from the AD9833. By setting the OPBITEN (D5)
control bit to 1, the MSB of the DAC data is available at
the VOUT pin. This is useful as a coarse clock source.
This square wave can also be divided by 2 before being
output. The bit DIV2 (D3) in the control register controls
the frequency of this output from the VOUT pin.
Sinusoidal Output:
The SIN ROM is used to convert the
phase information from the frequency and phase registers
into amplitude information which results in a sinusoidal
signal at the output. To have a sinusoidal output from the
VOUT pin, set the bit MODE (D1) = 0 and the
OPBITEN (D5) bit to 0.
Up/Down Ramp Output:
The SIN ROM can be bypassed
so that the truncated digital output from the NCO is sent
to the DAC. In this case, the output is no longer sinusoi-
dal. The DAC will produce a ramp up/down function. To
have a ramp output from the VOUT pin set the bit
MODE (D1) = 1.
Note that the SLEEP12 bit must be 0 (i.e. the DAC is
enabled) when using this pin.
Table 11: Various Outputs from VOUT
OPBITEN
bit
MODE
bit
DIV2
bit
VOUT
Pin
0
0
1
1
1
0
1
0
0
1
X
X
0
1
X
Sinusoid
Up/Down Ramp
DAC data MSB / 2
DAC data MSB
Reserved
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PDF描述 |
|---|---|
| AD9833BRM | +2.5 V to +5.5 V, 25 MHz Low Power CMOS Complete DDS |
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| AD9834BRU | Low Power, +2.3 V to +5.5 V, 50 MHz Complete DDS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9833BRM | 功能描述:IC WAVEFORM GEN PROG 10-MSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9833BRM-REEL | 制造商:Analog Devices 功能描述:Direct Digital Synthesizer 25MHz 1-DAC 10-Bit Serial 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:PROGRAMMABLE WAVEFORM GENERATOR 10MSOP - Tape and Reel |
| AD9833BRM-REEL7 | 功能描述:IC WAVEFORM GEN PROG 10-MSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9833BRMZ | 功能描述:IC WAVEFORM GENERTR PROG 10-MSOP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9833BRMZ | 制造商:Analog Devices 功能描述:WAVEFORM GENERATOR 9833 MSOP10 |
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