參數(shù)資料
型號(hào)： AD9786BSVRL
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 16-Bit, 200 MSPS/500 MSPS TxDAC+ with 2】/4】/8】 Interpolation and Signal Processing
中文描述： PARALLEL, WORD INPUT LOADING, 16-BIT DAC, PQFP80
封裝： PLASTIC, MS-026-ADD, TQFP-80
文件頁(yè)數(shù)： 46/60頁(yè)
文件大?。?/td> 1497K
代理商： AD9786BSVRL
AD9786
DATA INPUTS
Digital data inputs to the AD9786 are accessed on the
evaluation board through connectors J1 and J2. These are 40 pin
right angle connectors that are intended to be used with
standard ribbon cable connectors. The input levels should be
either 3.3 V or 2.5 V CMOS, depending on the setting of the
DRVDD jumper JP1. The data format is selectable through
Register 02h, Bit 7 (DATAFMT). With this bit set to a default 0,
the AD9786 assumes that the input data is in twos complement
format. With this bit set to 1, data should be input in offset
binary format.
Rev. 0 | Page 46 of 60
When the evaluation board is first powered up and the clock
and data are running, it is recommended that the proper
operating current is verified. Depress reset switch SW1 to
ensure that the AD9786 is in the default mode. The default
mode for the AD9786 is for the interpolation set to 1×. The
modulator is turned off in the default mode. The nominal
operating currents for the evaluation board in the power-up
default mode are shown in Table 39.
Additionally, the DRVDD power supply on the AD9786 is used
to supply power for the digital input bus. DRVDD can be run
from 2.5 V or 3.3 V. On the evaluation board, DRVDD is jumper
selectable by JP1, just to the left of the chip on the evaluation
board. With the jumper set to the 3.3 V position, DRVDD chip
receives its power from VDD3IN. With the jumper set to the
2.5 V position, DRVDD receives its power from AVDIN.
SERIAL PORT
SW1 is a hard reset switch that sets the AD9786 to its default
state. It should be used every time the AD9786 power supply is
cycled or the clock is interrupted, or if new data is to be written
via the SPI port. Set the SPI software to read back data from the
AD9786 and verify that when the software is run, the expected
values are read back.
Table 39. Nominal Operating Currents in Power-Up Default Mode
Nominal Current @ Speed (mA)
100 MSPS
49
83
4
30
27
Evaluation Board Power Supply
DVDD
CLKVDD
ACVDD and ADVDD
AVDD1
AVDD2
50 MSPS
26
78
1
30
27
150 MSPS
74
87
6
30
27
200 MSPS
99
92
8
30
27
Table 40. SPI Registers
Register
01h
Bit 7
INTERP[1]
Bit 6
INTERP[0]
Bit 5
Bit 4
Bit 3
Bit 0
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