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參數(shù)資料
| 型號： | AD9774ASZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 14BIT 32MSPS 44-MQFP |
| 產(chǎn)品培訓(xùn)模塊： | DAC Architectures |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標準包裝： | 1 |
| 系列： | TxDAC+® |
| 設(shè)置時間： | 35ns |
| 位數(shù)： | 14 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 1.13W |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 32M |
AD9774
–12–
REV. B
+2.7 TO +5.5VA
1.20V REF
REFLO
AVDD
ACOM
ICOMP
0.1 F
LSB
SWITCHES
SEGMENTED
SWITCHES
1.91k
IOUTA
IOUTB
CURRENT
SOURCE
ARRAY
REFIO
FS ADJ
0.1 F
50pF
AD9774
REFCOMP
0.1 F
Figure 26. Block Diagram of Internal DAC, 1.2 V Reference,
and Reference Control Circuits
The full-scale output current is regulated by the reference con-
trol amplifier and can be set from 2 mA to 20 mA via an exter-
nal resistor, RSET. The external resistor, in combination with
both the reference control amplifier and voltage reference,
REFIO, sets the reference current, IREF, which is mirrored over
to the segmented current sources with the proper scaling factor.
The full-scale current, IOUTFS, is exactly thirty-two times the
value of IREF.
DAC TRANSFER FUNCTION
The AD9774 provides complementary current outputs, IOUTA
and IOUTB. IOUTA will provide a near full-scale current out-
put, IOUTFS, when all bits are high (i.e., DAC CODE = 16383)
while IOUTB, the complementary output, provides no current.
The current output appearing at IOUTA and IOUTB is a func-
tion of both the input code and IOUTFS and can be expressed as:
IOUTA = (DAC CODE/16384)
× I
OUTFS
(1)
IOUTB = (16383 – DAC CODE)/16384
× I
OUTFS
(2)
where DAC CODE = 0 to 16383 (i.e., Decimal Representation).
As previously mentioned, IOUTFS is a function of the reference
current IREF, which is nominally set by a reference voltage
VREFIO and external resistor RSET. It can be expressed as:
IOUTFS = 32 × IREF
(3)
where IREF = VREFIO/RSET
(4)
The two current outputs will typically drive a resistive load
directly or via a transformer. If dc coupling is required, IOUTA
and IOUTB should be directly connected to matching resistive
loads, RLOAD, that are tied to analog common, ACOM. Note
that RLOAD may represent the equivalent load resistance seen by
IOUTA or IOUTB as would be the case in a doubly terminated
50
or 75 cable. The single-ended voltage output appearing
at the IOUTA and IOUTB nodes is simply:
VOUTA = IOUTA × RLOAD
(5)
VOUTB = IOUTB × RLOAD
(6)
Note that the full-scale value of VOUTA and VOUTB should not
exceed the specified output compliance range to maintain speci-
fied distortion and linearity performance.
The differential voltage, VDIFF, appearing across IOUTA and
IOUTB is:
VDIFF = (IOUTA – IOUTB) × RLOAD
(7)
Substituting the values of IOUTA, IOUTB and IREF; VDIFF can
be expressed as:
VDIFF = {(2 DAC CODE – 16383)/16384} ×
VDIFF = {(32 RLOAD/RSET) × VREFIO
(8)
These last two equations highlight some of the advantages of
operating the AD9774 differentially. First, the differential
operation will help cancel common-mode error sources associ-
ated with IOUTA and IOUTB such as noise, distortion and dc
offsets. Second, the differential code-dependent current and
subsequent voltage, VDIFF, is twice the value of the single-ended
voltage output (i.e., VOUTA or VOUTB), thus providing twice the
signal power to the load.
Note that the gain drift temperature performance for a single-
ended (VOUTA and VOUTB) or differential output (VDIFF) of
the AD9774 can be enhanced by selecting temperature tracking
resistors for RLOAD and RSET due to their ratiometric relation-
ship as shown in Equation 8.
REFERENCE OPERATION
The AD9774 contains an internal 1.20 V bandgap reference
that can be easily disabled and overridden by an external
reference. REFIO serves as either an input or output, depending
on whether the internal or external reference is selected. If
REFLO is tied to ACOM, as shown in Figure 27, the internal
reference is activated, and REFIO provides a 1.20 V output. In
this case, the internal reference must be compensated externally
with a ceramic chip capacitor of 0.1
F or greater from REFIO
to REFLO. If any additional loading is required, REFIO should
be buffered with an external amplifier having an input bias cur-
rent less than 100 nA.
50pF
+1.2V REF
AVDD
REFLO
CURRENT
SOURCE
ARRAY
+2.7 TO +5.5VA
REFIO
FSADJ
2k
0.1 F
AD9774
ADDITIONAL
LOAD
OPTIONAL
EXTERNAL
REF BUFFER
0.1 F
REFCOMP
Figure 27. Internal Reference Configuration
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external reference may then be applied
to REFIO as shown in Figure 28. The external reference may
provide either a fixed reference voltage to enhance accuracy and
drift performance or a varying reference voltage for gain control.
Note that the 0.1
F compensation capacitor is not required
since the internal reference is disabled, and the high input im-
pedance (i.e., 1 M
) of REFIO minimizes any loading of the
external reference.
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| AD9774ASZRL | 功能描述:IC DAC 14BIT 32MSPS 44MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 標準包裝:2,400 系列:- 設(shè)置時間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| AD9774EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 32 MSPS TxDAC⑩ with 4x Interpolation Filters |
| AD9774-EB | 制造商:Analog Devices 功能描述: |
| AD9774-EBZ | 制造商:Analog Devices 功能描述:14-BIT 32 MSPS TXDAC W/4X INTERPOLATION - Bulk |
| AD9775 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 160 MSPS 2X/4X/8X Interpolating Dual TxDAC+ D/A Converter |
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