- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1988 > AD9748ACPZRL7 (Analog Devices Inc)IC DAC 8BIT 210MSPS 32LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9748ACPZRL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 8BIT 210MSPS 32LFCSP |
| 標準包裝： | 1,500 |
| 系列： | TxDAC® |
| 設置時間： | 11ns |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字 |
| 功率耗散（最大）： | 145mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 210M |
AD9748
Data Sheet
Rev. B | Page 14 of 24
DAC TIMING
Input Clock and Data Timing Relationship
Dynamic performance in a DAC is dependent on the
relationship between the position of the clock edges and the
time at which the input data changes. The AD9748 is rising
edge triggered, and so exhibits dynamic performance sensitivity
when the data transition is close to this edge. In general, the
goal when applying the AD9748 is to make the data transition
close to the falling clock edge. This becomes more important as
the sample rate increases. Figure 21 shows the relationship of
SFDR to clock placement with different sample rates. Note that
at the lower sample rates, more tolerance is allowed in clock
placement, while at higher rates, more care must be taken.
50MHz SFDR
20MHz SFDR
CLOCK PLACEMENT (ns)
SFDR
(dB)
80
65
70
75
55
60
35
40
45
50
30
0
2
6
4
8
10
12
03211-018
Figure 21. SFDR vs. Clock Placement @ fOUT = 20 MHz and 50 MHz
(fCLOCK = 165 MSPS)
Sleep Mode Operation
The AD9748 has a power-down function that turns off the output
current and reduces the supply current to less than 6 mA over the
specified supply range of 2.7 V to 3.6 V and the temperature range.
This mode can be activated by applying a Logic Level 1 to the
SLEEP pin. The SLEEP pin logic threshold is equal to 0.5
AVDD. This digital input also contains an active pull-down
circuit that ensures that the AD9748 remains enabled if this
input is left disconnected. The AD9748 takes less than 50 ns to
power down and approximately 5 s to power back up.
POWER DISSIPATION
several factors that include the:
Power supply voltages (AVDD, CLKVDD, and DVDD)
Full-scale current output (IOUTFS)
Update rate (fCLOCK)
Reconstructed digital input waveform
The power dissipation is directly proportional to the analog
supply current, IAVDD, and the digital supply current, IDVDD. IAVDD
insensitive to fCLOCK.
Conversely, IDVDD is dependent on both the digital input
as a function of full-scale sine wave output ratios (fOUT/fCLOCK)
for various update rates with DVDD = 3.3 V.
IOUTFS (mA)
35
0
2
I AVDD
(mA)
30
25
20
15
10
4
6
8
10
12
14
16
18
20
03211-019
Figure 22. IAVDD vs. IOUTFS
RATIO (fOUT/fCLOCK)
20
0.01
1
0.1
I DV
DD
(
mA)
14
16
18
12
10
8
6
4
2
0
165MSPS
210MSPS
65MSPS
032
1
1-
041
125MSPS
Figure 23. IDVDD vs. Ratio @ DVDD = 3.3 V
fCLOCK (MSPS)
I CLKVDD
(mA)
11
0
150
100
50
200
250
PECL
DIFF
SE
10
9
8
7
6
5
4
3
2
1
03211-042
Figure 24. ICLKVDD vs. fCLOCK and Clock Mode
相關PDF資料 |
PDF描述 |
|---|---|
| AD9750ARUZRL7 | IC DAC 10BIT 125MSPS 28TSSOP |
| AD9751ASTZRL | IC DAC 10BIT 300MSPS 48LQFP |
| AD9752AR | IC DAC 12BIT 125MSPS 28-SOIC |
| AD9753ASTZRL | IC DAC 12BIT 300MSPS 48LQFP |
| AD9754AR | IC DAC 14BIT 125MSPS HP 28-SOIC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9748XCP | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Bit, 165 MSPS TxDAC D/A Converter |
| AD974AN | 功能描述:IC DAS 16BIT 4CH 200KSPS 28-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD974ANZ | 功能描述:IC DAS 16BIT 4CH 200KSPS 28DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD974AR | 功能描述:IC DAS 16BIT 4CH 200KSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - ADCs/DAC - 專用型 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 類型:數(shù)據(jù)采集系統(tǒng)（DAS） 分辨率（位）:16 b 采樣率（每秒）:21.94k 數(shù)據(jù)接口:MICROWIRE?，QSPI?，串行，SPI? 電壓電源:模擬和數(shù)字 電源電壓:1.8 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應商設備封裝:40-TQFN-EP（6x6） 包裝:托盤 |
| AD974ARS | 制造商:Analog Devices 功能描述:ADC Single 200ksps 16-bit Serial 28-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:4-CHANNEL 16 BIT 200KSPS DATA ACQ SYSTEM - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。