Data Sheet
AD9742
Rev. C | Page 3 of 32
SPECIFICATIONS
DC SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, DVDD = 3.3 V, CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
RESOLUTION
12
Bits
Integral Linearity Error (INL)
2.5
±0.5
+2.5
LSB
Differential Nonlinearity (DNL)
1.3
±0.4
+1.3
LSB
ANALOG OUTPUT
Offset Error
0.02
+0.02
% of FSR
Gain Error (Without Internal Reference)
0.5
±0.1
+0.5
% of FSR
Gain Error (With Internal Reference)
0.5
±0.1
+0.5
% of FSR
Full-Scale Output Current
22
20
mA
Output Compliance Range
1
+1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
V
Reference Output Current
3100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance (Ext. Reference)
1
M
Small Signal Bandwidth
0.5
MHz
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of FSR/°C
Gain Drift (Without Internal Reference)
±50
ppm of FSR/°C
Gain Drift (With Internal Reference)
±100
ppm of FSR/°C
Reference Voltage Drift
±50
ppm/°C
POWER SUPPLY
Supply Voltages
AVDD
2.7
3.3
3.6
V
DVDD
2.7
3.3
3.6
V
CLKVDD
2.7
3.3
3.6
V
Analog Supply Current (IAVDD)
33
36
mA
Digital Supply Current (IDVDD)4 8
9
mA
Clock Supply Current (ICLKVDD)
5
6
mA
Supply Current Sleep Mode (IAVDD)
5
6
mA
135
145
mW
145
mW
Power Supply Rejection Ratio—AVDD
61
+1
% of FSR/V
Power Supply Rejection Ratio—DV
DD60.04
+0.04
% of FSR/V
OPERATING RANGE
40
+85
°C
1
Measured at IOUTA, driving a virtual ground.
2
Nominal full-scale current, IOUTFS, is 32 times the IREF current.
3
An external buffer amplifier with input bias current <100 nA should be used to drive any external load.
4
Measured at fCLOCK = 25 MSPS and fOUT = 1 MHz.
5
Measured as unbuffered voltage output with IOUTFS = 20 mA and 50 RLOAD at IOUTA and IOUTB, fCLOCK = 100 MSPS and fOUT = 40 MHz.
6
±5% power supply variation.