參數(shù)資料
型號(hào): AD9520-3BCPZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 61/80頁(yè)
文件大小: 0K
描述: IC CLOCK GEN 2GHZ VCO 64LFCSP
設(shè)計(jì)資源: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121)
Phase Coherent FSK Modulator (CN0186)
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:12,2:24
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.25GHz
除法器/乘法器: 是/無(wú)
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 776 (CN2011-ZH PDF)
AD9520-3
Data Sheet
Rev. A | Page 64 of 80
REGISTER MAP DESCRIPTIONS
Table 51 to Table 61 provide a detailed description of each of the control register functions.
Table 51. SPI Mode Serial Port Configuration
Reg.
Addr.
(Hex)
Bits
Name
Description
0x000
7
SDO active
Selects unidirectional or bidirectional data transfer mode.
0: SDIO pin is used for write and read; SDO pin is high impedance (default).
1: SDO pin is used for read; SDIO pin is used for write; unidirectional mode.
6
LSB first/addr incr
SPI MSB or LSB data orientation. (This bit is ignored in I2C mode.)
0: data-oriented MSB first; the addressing decrements (default).
1: data-oriented LSB first; the addressing increments.
5
Soft reset
Soft reset.
1 (self-clearing):
if the EEPROM pin is high, soft reset loads the register values from the EEPROM. If the
EEPROM pin is low, soft reset loads the register values to the on-chip defaults.
4
Unused
Unused.
[3:0]
Mirror[7:4]
Bits[3:0] should always mirror Bits[7:4] so that it does not matter whether the part is in MSB or LSB first mode
(see Register 0x000[6]). Set the bits as follows:
Bit 0 = Bit 7
Bit 1 = Bit 6
Bit 2 = Bit 5
Bit 3 = Bit 4
0x003
[7:0]
Part ID (read only)
Uniquely identifies the dash version (AD9520-0 to AD9520-5) of the AD9520, as follows:
0x004
[7:1]
Unused
Unused.
0
Read back active
registers
Selects register bank used for a readback.
0: reads back buffer registers (default).
1: reads back active registers.
Table 52. I2C Mode Serial Port Configuration
Reg.
Addr.
(Hex)
Bits
Name
Description
0x000
[7:6]
Unused
Unused.
5
Soft reset
Soft reset.
1 (self-clearing):
if the EEPROM pin is high, soft reset loads the register values from the EEPROM. If the
EEPROM pin is low, soft reset loads the register values to the on chip defaults.
4
Unused
Unused.
[3:0]
Mirror[7:4]
Bits[3:0] should always mirror Bits[7:4] so that it does not matter whether the part is in MSB or LSB first mode.
See Table 51, Register 0x000, Bits[3:0].
0x003
[7:0]
Part ID (read only)
Uniquely identifies the dash version (AD9520-0 to AD9520-5) of the AD9520. See Table 51, Register 0x003.
0x004
[7:1]
Unused
Unused.
0
Read back active
registers
Selects register bank used for a readback.
0: reads back buffer registers (default).
1: reads back active registers.
Table 53. EEPROM Customer Version ID
Reg.
Addr.
(Hex)
Bits
Name
Description
0x005
[7:0]
EEPROM
customer version
ID (LSB)
16-bit EEPROM ID[7:0]. This register, along with Register 0x006, allows the user to store a unique ID
to identify which version of the AD9520 register settings is stored in the EEPROM. It does not affect
AD9520 operation in any way (default: 0x00).
0x006
[7:0]
EEPROM
customer version
ID (MSB)
16-bit EEPROM ID[15:8]. This register, along with Register 0x005, allows the user to store a unique ID
to identify which version of the AD9520 register settings is stored in the EEPROM. It does not affect
AD9520 operation in any way (default: 0x00).
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