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參數(shù)資料
| 型號： | AD9516-1BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 28/80頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK GEN 2.5GHZ VCO 64-LFCSP |
| 標準包裝： | 1 |
| 類型： | 時鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | 時鐘 |
| 輸出： | CMOS，LVDS，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:14 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.65GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 776 (CN2011-ZH PDF) |
| 配用： | AD9516-1/PCBZ-ND - BOARD EVALUATION FOR AD9516-1 |
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AD9516-1
Data Sheet
Rev. C | Page 34 of 80
In differential mode, the reference input pins are internally self-
biased so that they can be ac-coupled via capacitors. It is possible to
dc couple to these inputs. If the differential REFIN is driven by
a single-ended signal, the unused side (REFIN) should be
decoupled via a suitable capacitor to a quiet ground. Figure 49
shows the equivalent circuit of REFIN.
VS
REF1
REF2
REFIN
150
10k
12k
10k
REFIN
85k
VS
85k
VS
06
42
0-
0
66
Figure 49. REFIN Equivalent Circuit
Reference Switchover
The AD9516 supports dual single-ended CMOS inputs, as well
as a single differential reference input. In the dual single-ended
reference mode, the AD9516 supports automatic and manual
PLL reference clock switching between REF1 (on Pin REFIN)
and REF2 (on Pin REFIN). This feature supports networking
and other applications that require smooth switching of redundant
references. When used in conjunction with the automatic
holdover function, the AD9516 can achieve a worst-case
reference input switchover with an output frequency disturbance as
low as 10 ppm.
When using reference switchover, the single-ended reference
inputs should be dc-coupled CMOS levels and never be allowed
to go to high impedance. If these inputs are allowed to go to high
impedance, noise may cause the buffer to chatter, causing a
false detection of the presence of a reference.
Reference switchover can be performed manually or auto-
matically. Manual switchover is performed either through
Register 0x01C or by using the REF_SEL pin. Manual switchover
requires the presence of a clock on the reference input that is
being switched to, or that the deglitching feature be disabled
(Register 0x01C[7]). The reference switching logic fails if this
condition isn’t met, and the PLL does not reacquire.
Automatic revertive switchover relies on the REFMON pin to
indicate when REF1 disappears. By programming Register 0x01B =
0xF7 and Register 0x01C = 0x26, the REFMON pin is programmed
to be high when REF1 is invalid, which commands the switch to
REF2. When REF1 is valid again, the REFMON pin goes low, and
the part again locks to REF1. It is also possible to use the STATUS
pin for this function, and REF2 can be used as the preferred
reference.
A switchover deglitch feature ensures that the PLL does not
receive rising edges that are far out of alignment with the newly
selected reference.
Automatic nonrevertive switching is not supported.
Reference Divider R
The reference inputs are routed to the reference divider, R.
R (a 14-bit counter) can be set to any value from 0 to 16383 by
writing to Register 0x011 and Register 0x012. (Both R = 0 and
R = 1 give divide-by-1.) The output of the R divider goes to one
of the PFD inputs to be compared to the VCO frequency
divided by the N divider. The frequency applied to the PFD
must not exceed the maximum allowable frequency, which
depends on the antibacklash pulse setting (see Table 2).
The R counter has its own reset. R counter can be reset using
the shared reset bit of the R, A, and B counters. It can also be
reset by a SYNC operation.
VCXO/VCO Feedback Divider N—P, A, B, R
The N divider is a combination of a prescaler (P) and two
counters, A and B. The total divider value is
N = (P × B) + A
where the value of P can be 2, 4, 8, 16, or 32.
Prescaler
The prescaler of the AD9516 allows for two modes of operation:
a fixed divide (FD) mode of 1, 2, or 3, and dual modulus (DM)
mode where the prescaler divides by P and (P + 1) {2 and 3, 4
and 5, 8 and 9, 16 and 17, or 32 and 33}. The prescaler modes of
operation are given in Table 54, Register 0x016[2:0]. Not all
modes are available at all frequencies (see Table 2).
When operating the AD9516 in dual modulus mode (P//P + 1),
the equation used to relate input reference frequency to VCO
output frequency is
fVCO = (fREF/R) × (P × B + A) = fREF × N/R
However, when operating the prescaler in FD mode, 1, 2, or 3,
the A counter is not used (A = 0) and the equation simplifies to
fVCO = (fREF/R) × (P × B) = fREF × N/R
When A = 0, the divide is a fixed divide of P = 2, 4, 8, 16, or 32,
in which case the previous equation also applies.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9516-1BCPZ-REEL7 | 功能描述:IC CLOCK GEN 2.5GHZ VCO 64-LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9516-1XCPZ | 制造商:Analog Devices 功能描述:14-CHANNEL CLOCK GENERATOR WITH INTEGRATED 2.8 GHZ VCO - Bulk |
| AD9516-2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Output Clock Generator with Integrated 2.2 GHz VCO |
| AD9516-2/PCBZ | 功能描述:BOARD EVAL FOR AD9516-2 2.2GHZ RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:- 主要目的:電信，線路接口單元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要屬性:T1/J1/E1 LIU 次要屬性:- 已供物品:板，電源，線纜，CD 其它名稱:82EBV2081 |
| AD9516-2BCPZ | 功能描述:IC CLOCK PLL/VCO 2.2GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
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