fSAMPLE = 40 MSPS, f<" />
參數(shù)資料
型號: AD9272BSVZ-65
廠商: Analog Devices Inc
文件頁數(shù): 7/44頁
文件大?。?/td> 0K
描述: IC ADC OCT 12BIT 65MSPS 100-TQFP
設(shè)計資源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
特色產(chǎn)品: AD9272: Octal LNA/VGA/AAF/ADC and Crosspoint Switch
標準包裝: 1
類型: AAF,ADC,交叉點開關(guān),LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 1.8V,3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 780 (CN2011-ZH PDF)
配用: AD9272-65EBZ-ND - BOARD EVAL AD9272
AD9272
Rev. C | Page 15 of 44
TYPICAL PERFORMANCE CHARACTERISTICS
fSAMPLE = 40 MSPS, fIN = 5 MHz, RS = 50 Ω, LNA gain = 21.3 dB, LNA bias = high, PGA gain = 27 dB, AAF LPF cutoff = fSAMPLE/4.5, HPF = LPF
cutoff/20.7 (default), unless otherwise noted.
–2.0
–1.5
–0.5
–1.0
0
0.5
1.0
1.5
2.0
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0.2
0.4
0.6
0.8
1.0
GAIN+ (V)
G
AI
N
E
RRO
R
(
d
B)
1.2
1.4
1.6
+85°C
+25°C
–40°C
07
02
9-
11
4
Figure 5. Gain Error vs. GAIN+ at Three Temperatures
0
5
10
15
20
25
–1
.0
–0
.9
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.7
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PE
R
C
EN
T
A
G
E
O
F
U
N
IT
S
(
%
)
GAIN ERROR (dB)
07
02
9-
1
84
Figure 6. Gain Error Histogram, GAIN+ = 0.16 V
0
2
4
6
10
8
12
14
–1
.0
–0
.9
–0
.8
–0
.7
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P
E
RCE
NT
A
G
E
O
F
UNI
T
S
(
%
)
GAIN ERROR (dB)
07
02
9-
1
85
Figure 7. Gain Error Histogram, GAIN+ = 0.8 V
0
5
10
15
20
25
–1
.0
–0
.9
–0
.8
–0
.7
–0
.6
–0
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P
E
RCE
NT
A
G
E
O
F
UNI
T
S
(
%
)
GAIN ERROR (dB)
07
02
9-
1
86
Figure 8. Gain Error Histogram, GAIN+ = 1.44 V
0
5
10
15
20
25
–1.25 –1.00 –0.75
P
E
RCE
NT
A
G
E
O
F
UNI
T
S
(
%
)
–0.50 –0.25
0
CHANNEL-TO-CHANNEL GAIN MATCHING (dB)
0.25 0.50 0.75 1.00 1.25
07
02
9-
1
80
Figure 9. Gain Match Histogram, GAIN+ = 0.3 V
07
02
9-
1
81
5
0
10
15
20
25
–1.25 –1.00 –0.75
P
E
RCE
NT
A
G
E
O
F
UNI
T
S
(
%
)
–0.50 –0.25
0
CHANNEL-TO-CHANNEL GAIN MATCHING (dB)
0.25 0.50 0.75 1.00 1.25
Figure 10. Gain Match Histogram, GAIN+ = 1.3 V
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