I
參數(shù)資料
型號: AD9272BSVZ-65
廠商: Analog Devices Inc
文件頁數(shù): 42/44頁
文件大?。?/td> 0K
描述: IC ADC OCT 12BIT 65MSPS 100-TQFP
設(shè)計資源: Powering AD9272 with ADP5020 Switching Regulator PMU for Increased Efficiency (CN0135)
特色產(chǎn)品: AD9272: Octal LNA/VGA/AAF/ADC and Crosspoint Switch
標準包裝: 1
類型: AAF,ADC,交叉點開關(guān),LNA,VGA
分辨率(位): 12 b
采樣率(每秒): 65M
數(shù)據(jù)接口: 串行
電壓電源: 模擬和數(shù)字
電源電壓: 1.8V,3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
產(chǎn)品目錄頁面: 780 (CN2011-ZH PDF)
配用: AD9272-65EBZ-ND - BOARD EVAL AD9272
AD9272
Rev. C | Page 7 of 44
AD9272-40
AD9272-65
AD9272-80
Parameter1
Conditions
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
IAVDD1
Full-channel
mode
210
280
335
mA
CW Doppler mode
with four channels
enabled
32
mA
IAVDD2
Full-channel mode
365
mA
CW Doppler mode
with four channels
enabled
140
mA
IDRVDD
49
51
52
mA
Total Power
Dissipation
Includes output
drivers, full-
channel mode, no
signal
1560
1713
1690
1860
1780
1975
mW
CW Doppler mode
with four channels
enabled
475
mW
Power-Down
Dissipation
5
mW
Standby Power
Dissipation
175
200
210
mW
Power Supply
Rejection Ratio
(PSRR)
1.6
mV/V
ADC RESOLUTION
12
Bits
ADC REFERENCE
Output Voltage Error
VREF = 1 V
±20
mV
Load Regulation
At 1.0 mA,
VREF = 1 V
2
mV
Input Resistance
6
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were
completed.
2 SE = single-ended.
3 AAF settings < 5 MHz are out of range and not supported.
4 The overrange condition is specified as being 6 dB more than the full-scale input range.
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