參數(shù)資料
型號(hào)： AD9262BCPZRL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 8/32頁(yè)
文件大小： 0K
描述： IC ADC 16BIT 2.5MHZ 64LFCSP
設(shè)計(jì)資源： Interfacing ADL5382 to AD9262 as an RF-to-Bits Solution (CN0062)
標(biāo)準(zhǔn)包裝： 750
位數(shù)： 16
采樣率（每秒）： 160M
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 640mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤(pán)，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 2 個(gè)單端，雙極；1 個(gè)差分，單極
AD9262
Rev. A | Page 16 of 32
THEORY OF OPERATION
The AD9262 uses a continuous time Σ-Δ modulator to convert
the analog input to a digital word. The digital word is processed
by the decimation filter and rate-adjusted by the sample rate
converter (see Figure 37). The modulator consists of a continuous
time loop filter preceding a quantizer that samples at fMOD =
640 MSPS. This produces an oversampling ratio (OSR) of 32 for
a 10 MHz input bandwidth. The output of the quantizer is fed
back to a DAC that ideally cancels the input signal. The incom-
plete input cancellation residue is filtered by the loop filter and
is used to form the next quantizer sample.
H(f)
LOOP FILTER
QUANTIZER
+
–
DAC
ADC
MODULATOR
DECIMATION
FILTER
SAMPLE RATE
CONVERTER
SRC
07
77
2-
03
3
Figure 37. Σ-Δ Modulator Overview
The quantizer produces a nine-level digital word. The quantization
noise is spread uniformly over the Nyquist band (see Figure 38),
but the feedback loop causes the quantization noise present in
the nine-level output to have a nonuniform spectral shape. This
noise-shaping technique (see Figure 39) pushes the in-band
noise out of band; therefore, the amount of quantization noise
in the frequency band of interest is minimal.
The digital decimation filter that follows the modulator removes
the large out-of-band quantization noise (see Figure 40), while
also reducing the data rate from fMOD to fMOD/16. If the internal
PLL is enabled, the sample rate converter generates samples at
the same frequency as the input clock frequency. If the internal
PLL is disabled, the sample rate converter can be programmed
to give an output frequency that is a divide ratio of the modulator
clock. The sample rate converter is designed to attenuate images
outside the band of interest (see Figure 41).
QUANTIZATION NOISE
fMOD/2
BAND OF INTEREST
07
77
2-
0
34
Figure 38. Quantization Noise
NOISE SHAPING
BAND OF INTEREST
fMOD/2
0
77
72
-03
5
Figure 39. Noise Shaping
fMOD/32
fMOD/16
BAND OF INTEREST
DIGITAL FILTER CUTOFF FREQUENCY
0
77
72
-03
6
Figure 40. Digital Filter Cutoff Frequency
fMOD/16
fOUT/2
fOUT
BAND OF INTEREST
07
77
2-
0
3
7
Figure 41. Sample Rate Converter
ANALOG INPUT CONSIDERATIONS
The continuous time modulator removes the need for an anti-
alias filter at the input to the AD9262. A discrete time converter
aliases signals around the sample clock frequency and its multiples
to the band of interest (see Figure 42). Therefore, an external
antialias filter is needed to reject these signals.
DESIRED
INPUT
UNDESIRED
SIGNAL
ADC
fS
fS/2
07
77
2-
03
8
Figure 42. Discrete Time Converter
In contrast, the continuous time Σ-Δ modulator used within the
AD9262 has inherent antialiasing. The antialiasing property
results from sampling occurring at the output of the loop filter
(see Figure 43), and thus aliasing occurs at the same point in the
loop as quantization noise is injected; aliases are shaped by the
same mechanism as quantization noise. The quantization noise
transfer function, NTF(f), has zeros in the band of interest and in
all alias bands because NTF(f) is a discrete time transfer function,
whereas the loop filter transfer function, LF(f), is a continuous
time transfer function, which introduces poles only in the band
of interest. The signal transfer function, being the product of
NTF(f) and LF(f), only has zeros in alias bands and therefore
suppresses all aliases.
LF(f)
H(z)
QUANTIZATION
NOISE
INP UT
OUTPUT
LOOP FILTER
fMOD
f
NTF(f)
L F(f)
07
77
2-
0
39
Figure 43. Continuous Time Converter
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