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參數(shù)資料
| 型號： | AD9246BCPZRL7-125 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 125MSPS 48-LFCSP |
| 設(shè)計資源： | Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002) Driving AD9233/46/54 ADCs in AC-Coupled Baseband Appls (CN0051) |
| 標(biāo)準(zhǔn)包裝： | 750 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 125M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 3 |
| 功率耗散（最大）： | 425mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；1 個差分，單極 |
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AD9246
Rev. A | Page 28 of 44
EVALUATION BOARD
The AD9246 evaluation board provides all of the support
circuitry required to operate the ADC in its various modes and
configurations. The converter can be driven differentially through
a double balun configuration (default) or through the AD8352
differential driver. The ADC can also be driven in a single-ended
fashion. Separate power pins are provided to isolate the DUT
from the AD8352 drive circuitry. Each input configuration can
be selected by proper connection of various components (see
characterization setup used to evaluate the ac performance of
the AD9246.
It is critical that the signal sources used for the analog input and
clock have very low phase noise (<1 ps rms jitter) to realize the
optimum performance of the converter. Proper filtering of the
analog input signal to remove harmonics and lower the integrated
or broadband noise at the input is also necessary to achieve the
specified noise performance.
See Figure 60 to Figure 64 for the complete schematics and
layout diagrams that demonstrate the routing and grounding
techniques that should be applied at the system level.
POWER SUPPLIES
This evaluation board comes with a wall-mountable switching
power supply that provides a 6 V, 2 A maximum output. Connect
the supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz
to 63 Hz. The other end is a 2.1 mm inner diameter jack that
connects to the PCB at P500. Once on the PC board, the 6 V
supply is fused and conditioned before connecting to five low
dropout linear regulators that supply the proper bias to each of
the various sections on the board.
When operating the evaluation board in a nondefault condition,
L501, L503, L504, L508, and L509 can be removed to disconnect
the switching power supply. This enables the user to individually
bias each section of the board. Use P501 to connect a different
supply for each section. At least one 1.8 V supply is needed with
a 1 A current capability for AVDD_DUT and DRVDD_DUT;
however, it is recommended that separate supplies be used for
analog and digital. To operate the evaluation board using the
AD8352 option, a separate 5.0 V supply (AMP_VDD) with a
1 A current capability is needed. To operate the evaluation board
using the alternate SPI options, a separate 3.3 V analog supply
is needed, in addition to the other supplies. The 3.3 V supply
(AVDD_3.3V) should have a 1 A current capability, as well.
Solder Jumpers J501, J502, and J505 allow the user to combine
these supplies (see Figure 64 for more details).
INPUT SIGNALS
When connecting the clock and analog source, use clean signal
generators with low phase noise, such as Rohde & Schwarz SMHU
or Agilent HP8644 signal generators or the equivalent. Use
1-meter long, shielded, RG-58, 50 Ω coaxial cable for making
connections to the evaluation board. Enter the desired frequency
and amplitude for the ADC. Typically, most evaluation boards
from Analog Devices, Inc. can accept a ~2.8 V p-p or 13 dBm
sine wave input for the clock. When connecting the analog
input source, it is recommended to use a multipole, narrow-
band, band-pass filter with 50 Ω terminations. Analog Devices
uses TTE, Allen Avionics, and K&L types of band-pass filters.
Connect the filter directly to the evaluation board, if possible.
OUTPUT SIGNALS
The parallel CMOS outputs interface directly with the Analog
Devices standard single-channel FIFO data capture board
(HSC-ADC-EVALB-SC). For more information on the FIFO
boards and their optional settings, visit www.analog.com/FIFO.
ROHDE & SCHWARZ,
SMHU,
2V p-p SIGNAL
SYNTHESIZER
ROHDE & SCHWARZ,
SMHU,
2V p-p SIGNAL
SYNTHESIZER
BAND-PASS
FILTER
AIN
CLK
14-BIT
PARALLEL
CMOS
USB
CONNECTION
AD9246
EVALUATION BOARD
HSC-ADC-EVALB-SC
FIFO DATA
CAPTURE
BOARD
PC
RUNNING
ADC
ANALYZER
AND SPI
USER
SOFTWARE
1.8V
–+
A
V
DD_DU
T
VD
L
D
R
V
DD_DU
T
GN
D
GN
D
–+
5.0V
GN
D
A
M
P_VD
D
2.5V
6V DC
2A MAX
WALL OUTLET
100V TO 240V AC
47Hz TO 63Hz
SWITCHING
POWER
SUPPLY
–+
GN
D
3.3V
AV
D
_3
.3
V
–+
GN
D
3.3V
–+
VC
C
GN
D
3.3V
SPI
05
49
1-
0
82
Figure 59. Evaluation Board Connection
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9246BCPZRL7-80 | 制造商:Analog Devices 功能描述:14-BIT, 80 MSPS/105 MSPS/125 MSPS, 1.8 V ANALOG-TO-DIGITAL C - Tape and Reel |
| AD9248 | 制造商:Analog Devices 功能描述:40 MSPS DUAL A/D CONVERTER - Bulk |
| AD9248-20PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| AD9248-40PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter |
| AD9248-65PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 20/40/65 MSPS Dual A/ D Converter |
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