參數資料
| 型號： | AD9203ARU |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 3/28頁 |
| 文件大小： | 0K |
| 描述： | IC ADC 10BIT 40MSPS 3V 28-TSSOP |
| 標準包裝： | 50 |
| 位數： | 10 |
| 采樣率（每秒）： | 40M |
| 數據接口： | 并聯 |
| 轉換器數目： | 5 |
| 功率耗散（最大）： | 108mW |
| 電壓電源： | 模擬和數字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 28-TSSOP |
| 包裝： | 管件 |
| 輸入數目和類型： | 2 個單端，單極；1 個差分，單極 |
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AD9203
Rev. B | Page 11 of 28
OPERATIONS
THEORY OF OPERATION
The AD9203 implements a pipelined multistage architecture to
achieve high sample rates while consuming low power. It
distributes the conversion over several smaller A/D subblocks,
refining the conversion with progressively higher accuracy as it
passes the results from stage to stage. As a consequence of the
distributed conversion, the AD9203 requires a small fraction of
the 1023 comparators used in a traditional 10-bit flash-type
A/D. A sample-and-hold function within each of the stages
permits the first stage to operate on a new input sample while
the remaining stages operate on preceding samples.
Each stage of the pipeline, excluding the last, consists of a low
resolution flash A/D connected to a switched capacitor DAC
and interstage residue amplifier (MDAC). The residue amplifier
magnifies the difference between the reconstructed DAC output
and the flash input for the next stage in the pipeline. One bit of
redundancy is used in each one of the stages to facilitate digital
correction of flash errors. The last stage simply consists of a
flash A/D.
The input of the AD9203 incorporates a novel structure that
merges the input sample-and-hold amplifier (SHA) and the first
pipeline residue amplifier into a single, compact switched
capacitor circuit. This structure achieves considerable noise and
power savings over a conventional implementation that uses
separate amplifiers by eliminating one amplifier in the pipeline.
By matching the sampling network of the input SHA with the
first stage flash A/D, the AD9203 can sample inputs well
beyond the Nyquist frequency with no degradation in
performance. Sampling occurs on the falling edge of the clock.
OPERATIONAL MODES
The AD9203 may be connected in several input configurations,
as shown in Table 4.
The AD9203 may be driven differentially from a source that
keeps the signal peaks within the power supply rails.
Alternatively, the input may be driven into AINP or AINN from
a single-ended source. The input span will be 2 the
programmed reference voltage. One input will accept the signal,
while the opposite input will be set to midscale by connecting it
to the internal or an external reference. For example, a 2 V p-p
signal may be applied to AINP while a 1 V reference is applied
to AINN. The AD9203 will then accept a signal varying
between 2 V and 0 V. See Figure 19, Figure 20, and Figure 21 for
more details.
The single-ended (ac-coupled) input of the AD9203 may also be
clamped to ground by the internal clamp switch. This is
accomplished by connecting the CLAMP pin to AINN or AINP.
Digital output formats may be configured in binary and twos
complement. This is determined by the potential on the DFS
pin. If the pin is set to Logic 0, the data will be in straight binary
format. If the pin is asserted to Logic 1, the data will be in twos
complement format.
Power consumption may be reduced by placing a resistor
between PWRCON and AVSS. This may be done to conserve
power when not encoding high-speed analog input frequencies
or sampling at the maximum conversion rate. See the
Power Control section for more information.
Table 4. Modes
Name
Figure Number
Advantages
1 V Differential
Figure 28 with VREF Connected to
REFSENSE
Differential Modes Yield the Best Dynamic Performance
2 V Differential
Figure 28 with REFSENSE Connected to
AGND
Differential Modes Yield the Best Dynamic Performance
1 V Single-Ended
Video and Applications Requiring Clamping Require Single-Ended Inputs
2 V Single-Ended
Video and Applications Requiring Clamping Require Single-Ended Inputs
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9203ARURL7 | 功能描述:IC ADC 10BIT 40MSPS 3V 28-TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:16 采樣率（每秒）:45k 數據接口:串行 轉換器數目:2 功率耗散（最大）:315mW 電壓電源:模擬和數字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數目和類型:2 個單端，單極 |
| AD9203ARUZ | 功能描述:IC ADC 10BIT 40MSPS 3V 28-TSSOP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1 系列:microPOWER™ 位數:8 采樣率（每秒）:1M 數據接口:串行，SPI? 轉換器數目:1 功率耗散（最大）:- 電壓電源:模擬和數字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD9203ARUZ | 制造商:Analog Devices 功能描述:IC ADC 10BIT 40MSPS 28TSSOP |
| AD9203ARUZ | 制造商:Analog Devices 功能描述:IC, ADC, 10BIT, 40MSPS, TSSOP-28 |
| AD9203ARUZ1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 40 MSPS, 3 V, 74 mW A/D Converter |
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