參數(shù)資料
型號(hào)： AD9148-EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 32/72頁(yè)
文件大小： 0K
描述： BOARD EVALUATION FOR AD9148
設(shè)計(jì)資源： AD9148-EBZ Schematic
AD9148-EBZ BOM
AD9148-EBZ Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC+®
DAC 的數(shù)量： 4
位數(shù)： 16
采樣率（每秒）： 1G
數(shù)據(jù)接口： 串行，SPI?
設(shè)置時(shí)間： 20ns
DAC 型： 電流
工作溫度： -40°C ~ 85°C
已供物品： 板
已用 IC / 零件： AD9148
AD9148
Data Sheet
Rev. B | Page 38 of 72
Register Name
Addr
(Hex)
Bit
Name
Function
Default
SED Control/Status
40
7
SED compare enable Enables the SED circuitry.
0
6
Port B error
detected
Status of last compare on Port B.
0
5
Port A error
detected
Status of last compare on Port A.
0
3
Auto-clear enable
Enables the auto reset after eight valid sample sets.
0
2
Port B compare
failed
Fail status determined for last sample set on Port B.
0
1
Port A compare
failed
Fail status determined for last sample set on Port A.
0
Compare passed
Pass status determined for last sample set.
0
SED_R_L
41
7:0
SED Status Rising
Edge Samples[7:0]
SED Status Rising Edge Samples[15:0] indicate which bits
were received in error.
Read-
only
Set DAC SPI select = 0 to read back errors on Port A.
Set DAC SPI select = 1 to read back errors on Port B.
SED_R_H
42
7:0
SED Status Rising
Edge Samples[15:8]
SED Status Rising Edge Samples[15:0] indicate which bits
were received in error.
Read-
only
Set DAC SPI select = 0 to read back errors on Port A.
Set DAC SPI select = 1 to read back errors on Port B.
SED_F_L
43
7:0
SED Status Falling
Edge Samples[7:0]
SED Status Falling Edge Samples[15:0] indicate which bits
were received in error.
Read-
only
Set DAC SPI select = 0 to read back errors on Port A.
Set DAC SPI select = 1 to read back errors on Port B.
SED_F_H
44
7:0
SED Status Falling
Edge Samples[15:8]
SED Status Falling Edge Samples[15:0] indicate which bits
were received in error.
Read-
only
Set DAC SPI select = 0 to read back errors on Port A.
Set DAC SPI select = 1 to read back errors on Port B.
I Gain Control
50
7:0
IGain
IGain[7:0] is a value that directly scales the samples written to
the IDAC. The bit weighting is MSB = 21 and LSB = 26, which
yields a multiplier range of 0 to 3.984375.
40
Set DAC SPI select = 0 to configure DAC 1 path.
Set DAC SPI select = 1 to configure DAC 3 path.
Q Gain Control
51
7:0
QGain
QGain[7:0] is a value that directly scales the samples written
to the QDAC. The bit weighting is MSB = 21 and LSB = 26,
which yields a multiplier range of 0 to 3.984375.
40
Set DAC SPI select = 0 to configure DAC 2 path.
Set DAC SPI select = 1 to configure DAC 4 path.
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