TMIN
參數(shù)資料
型號: AD9117-DPG2-EBZ
廠商: Analog Devices Inc
文件頁數(shù): 50/52頁
文件大小: 0K
描述: IC DAC DUAL 14BIT LO PWR 40LFCSP
標準包裝: 1
系列: TxDAC®
DAC 的數(shù)量: 2
位數(shù): 14
采樣率(每秒): 125M
數(shù)據(jù)接口: 串行
DAC 型: 電流
工作溫度: -40°C ~ 85°C
已供物品:
已用 IC / 零件: AD9117
Data Sheet
AD9114/AD9115/AD9116/AD9117
Rev. C | Page 7 of 52
DIGITAL SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3.3 V, IxOUTFS = 20 mA, maximum sample rate, unless otherwise noted.
Table 2.
Parameter
Min
Typ
Max
Unit
DAC CLOCK INPUT (CLKIN)
VIH
2.1
3
V
VIL
0
0.9
V
Maximum Clock Rate
125
MSPS
SERIAL PERIPHERAL INTERFACE
Maximum Clock Rate (SCLK)
25
MHz
Minimum Pulse Width High
20
ns
Minimum Pulse Width Low
20
ns
Minimum SDIO and to SCLK Setup, tDS
10
ns
Minimum SCLK to SDIO Hold, tDH
5
ns
Maximum SCLK to Valid SDIO, tDV
20
ns
Minimum SCLK to Invalid SDIO, tDNV
5
ns
INPUT DATA
1.8 V Q Channel or DCLKIO Falling Edge
Setup
0.25
ns
Hold
1.2
ns
1.8 V I Channel or DCLKIO Rising Edge
Setup
0.13
ns
Hold
1.1
ns
3.3 V Q Channel or DCLKIO Falling Edge
Setup
0.2
ns
Hold
1.5
ns
3.3 V I Channel or DCLKIO Rising Edge
Setup
0.2
ns
Hold
1.6
ns
DVDDIO = 3.3 V
VIH
2.1
3
V
VIL
0
0.9
V
DVDDIO = 1.8 V
VIH
1.2
1.8
V
VIL
0
0.5
V
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