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參數資料
| 型號： | AD9023 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | ADC |
| 英文描述： | 12-Bit 20 MSPS Monolithic A/D Converter |
| 中文描述： | 12位20 MSPS的單片A/D轉換 |
| 文件頁數： | 8/8頁 |
| 文件大?。?/td> | 368K |
| 代理商： | AD9023 |
–8–
AD9023
Pulse width of the ADC encode clock must be controlled to en-
sure the best possible performance. Dynamic performance is
guaranteed with a clock pulse HIGH minimum of 25 ns. Opera-
tion with narrower pulses will degrade SNR and dynamic per-
formance. From a system perspective, this is generally not a
problem because a simple inverter can be used to generate a
suitable clock if the system clock is less than 25 ns wide.
The AD9023 provides latched data outputs. Data outputs are
available two pipeline delays and one propagation delay after the
rising edge of the encode clock (refer to the AD9023 Timing
Diagram). The length of the output data lines and the loads
placed on them should be minimized to reduce transients within
the AD9023; these transients can detract from the converter’s
dynamic performance. Operation at encode rates less than
4 Msps is not recommended. The internal track-and-hold satu-
rates, causing erroneous conversions. This T/H saturation pre-
cludes clocking the AD9023 in a burst mode.
The duty cycle of the encode clock for the AD9023 is critical for
obtaining rated performance of the ADC. Internal pulse widths
within the track-and-hold are established by the encode com-
mand pulse width; to ensure rated performance, minimum and
maximum pulse width restrictions should be observed. Opera-
tion at 20 Msps is optimized when the duty cycle is held at 55%.
REV. A
Analog Input
The analog input (Pin 12) voltage range is nominally
±
1.024
volts. The range is set with an internal voltage reference and
cannot be adjusted by the user. The input resistance is 300
and the analog bandwidth is 110 MHz, making the AD9023
useful in undersampling applications.
The AD9023 should be driven from a low impedance source.
The noise and distortion of the amplifier should be considered
to preserve the dynamic range of the AD9023.
ENCODE
–5.2V
A
IN
AD9023
12
8
17
62
0.1
μ
F
5
ENCODE
–5.2V
–5.2V
(510
ON EACH
DATA BIT)
(510
ON EACH
DATA BIT)
10176
10176
Figure 12. AD9023 Evaluation Board
Power Supplies
The power supplies of the AD9023 should be isolated from the
supplies used for noisy devices (digital logic especially) to re-
duce the amount of noise coupled into the ADC. For optimum
performance, linear supplies ensure that switching noise from
the supplies does not introduce distortion products during the
encoding process. If switching supplies must be used, decoupling
recommendations above are critically important. The PSRR of
the AD9023 is a function of the ripple frequency present on the
supplies. Clearly, power supplies with the lowest possible fre-
quency should be selected.
P
C
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Q-28 (Ceramic DIP)
0.225
(5.72)
MAX
0.150
(3.81)
MIN
0.015
(0.38)
MIN
28
15
1
14
0.026 (0.660)
0.014 (0.356)
0.620 (15.75)
0.590 (14.99)
0.018 (0.457)
0.008 (0.203)
0.07 (1.78)
0.03 (0.76)
0.110 (2.79)
0.090 (2.29)
0.610 (15.49)
0.500 (12.70)
1.490 (37.85) MAX
Z-28 (Ceramic Leaded Chip Carrier)
TOP VIEW
0.050
(1.27)
TYP
1
14
28
15
0.025
(0.635)
MIN
0.115
(2.921)
MAX
0.765 (19.431)
0.745 (18.923)
0.060 (1.524)
0.040 (1.016)
0.165
(4.191)
MAX
0.015
(0.381)
MIN
0.51 (12.954)
0.49 (12.446)
0.73 (18.544)
0.71 (18.036)
0.012 (0.305)
0.009 (0.229)
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PDF描述 |
|---|---|
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9023/PCB | 制造商:Analog Devices 功能描述: |
| AD9023AQ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD9023AZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ad9023bq | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述: |
| AD9023BZ | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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